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TMS320F28035MPNTEP Datasheet(PDF) 44 Page - Texas Instruments |
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TMS320F28035MPNTEP Datasheet(HTML) 44 Page - Texas Instruments |
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44 / 144 page  M0 Vector RAM (Enabled if VMAP = 0) M0 SARAM (1K 16, 0-Wait) ´ 0x00 0000 0x00 0040 M1 SARAM (1K 16, 0-Wait) ´ 0x00 0400 Data Space Prog Space Reserved 0x00 2000 Reserved Peripheral Frame 1 (1K 16, Protected) ´ 0x00 6000 Peripheral Frame 3 (1.5K 16, Protected) ´ 0x00 6400 Peripheral Frame 1 (1.5K 16, Protected) ´ 0x00 6A00 Peripheral Frame 2 (4K 16, Protected) ´ 0x00 7000 Reserved Peripheral Frame 0 0x00 0800 Peripheral Frame 0 0x00 1580 0x00 0D00 PIE Vector - RAM (256 16) (Enabled if VMAP = 1, ENPIE = 1) ´ 0x00 1400 0x00 0E00 0x00 1500 0x00 1480 CPU-to-CLA Message RAM CLA-to-CPU Message RAM CLA Registers Peripheral Frame 0 0x00 8000 L0 SARAM (2K 16) (0-Wait, Secure Zone + ECSL, Dual-Mapped) ´ 0x00 8800 L1 DPSARAM (1K 16) (0-Wait, Secure Zone + ECSL, CLA Data RAM 0) ´ 0x00 8C00 L2 DPSARAM (1K 16) (0-Wait, Secure Zone + ECSL, CLA Data RAM 1) ´ 0x00 9000 L3 DPSARAM (4K 16) (0-Wait, Secure Zone + ECSL, CLA Prog RAM) ´ 0x3D 7800 User OTP (1K 16, Secure Zone + ECSL) ´ 0x3D 7C80 Calibration Data 0x00 A000 Reserved 0x3D 7C00 Reserved FLASH (64K 16, 8 Sectors, Secure Zone + ECSL) ´ L0 SARAM (2K 16) (0-Wait, Secure Zone + ECSL, Dual-Mapped) ´ 128-Bit Password Boot ROM (8K 16, 0-Wait) ´ Vector (32 Vectors, Enabled if VMAP = 1) 0x3E 8000 0x3F 7FF8 0x3F 8000 0x3F 8800 0x3F E000 0x3F FFC0 Reserved 0x3D 7EB0 Reserved 0x3D 7CC0 Get_mode function 0x3D 7CE0 Reserved 0x3D 7E80 PARTID Calibration Data 44 TMS320F28035-EP SPRSP25A – JUNE 2018 – REVISED JULY 2018 www.ti.com Submit Documentation Feedback Product Folder Links: TMS320F28035-EP Detailed Description Copyright © 2018, Texas Instruments Incorporated A. CLA-specific registers and RAM apply to the 28035 device only. B. Memory locations 0x3D7E80-0x3D7EAF are reserved in TMX silicon. Figure 5-1. 28035 Memory Map |
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