TMS320F28035MPNTEP datasheet(74/144 Pages) TI1

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TMS320F28035-EP

SPRSP25A – JUNE 2018 – REVISED JULY 2018

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Detailed Description

5.9.2.1.3 On-Chip Analog-to-Digital Converter (ADC) Electrical Data/Timing

(1)

INL will degrade when the ADC input voltage goes above VDDA.

(2)

1 LSB has the weighted value of full-scale range (FSR)/4096. FSR is 3.3 V with internal reference and VREFHI - VREFLO for external

reference.

(3)

For more details, see the TMS320F2803x Piccolo™ MCUs Silicon Errata.

(4)

Periodic self-recalibration will remove system-level and temperature dependencies on the ADC zero offset error. This can be performed

as needed in the application without sacrificing an ADC channel by using the procedure listed in the "ADC Zero Offset Calibration"

section of the TMS320x2802x, 2803x Piccolo Analog-to-Digital Converter (ADC) and Comparator Reference Guide.

(5)

VREFLO is always connected to VSSA on the 64-pin PAG device.

(6)

VREFHI must not exceed VDDA when using either internal or external reference modes. Because VREFHI is tied to ADCINA0 on the 64-pin

PAG device, the input signal on ADCINA0 must not exceed VDDA.

Table 5-27. ADC Electrical Characteristics

PARAMETER

MIN

TYP

MAX

UNIT

DC SPECIFICATIONS

Resolution

Bits

ADC clock

60-MHz device

0.001

MHz

Sample Window

28035/34/33/32

ADC

Clocks

28031/30

ACCURACY

INL (Integral nonlinearity) at ADC Clock

≤ 30 MHz(1)

–4

LSB

DNL (Differential nonlinearity) at ADC Clock

≤ 30 MHz,

no missing codes

–1

LSB

Offset error(2)

Executing a single self-

recalibration(3)

–20

LSB

Executing periodic self-

recalibration(4)

–4

Overall gain error with internal reference

–60

LSB

Overall gain error with external reference

–40

LSB

Channel-to-channel offset variation

–4

LSB

Channel-to-channel gain variation

–4

LSB

ADC temperature coefficient with internal reference

–50

ppm/°C

ADC temperature coefficient with external reference

–20

ppm/°C

VREFLO

–100

µA

VREFHI

100

µA

ANALOG INPUT

Analog input voltage with internal reference

3.3

Analog input voltage with external reference

VREFLO

VREFHI

VREFLO input voltage

(5)

VSSA

0.66

VREFHI input voltage

(6)

2.64

VDDA

with VREFLO = VSSA

1.98

VDDA

Input capacitance

Input leakage current

±2

μA

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