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SSL8516T Datasheet(PDF) 17 Page - NXP Semiconductors

Part # SSL8516T
Description  Greenchip PFC and flyback controller
PDF  33 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

SSL8516T Datasheet(HTML) 17 Page - NXP Semiconductors

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SSL8516T
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet
Rev. 1 — 5 May 2014
17 of 33
NXP Semiconductors
SSL8516T
Greenchip PFC and flyback controller
7.3.7 Maximum on-time
The flyback controller limits the on-time of the external MOSFET to 38.5
s. When the
on-time is longer than 38.5
s, the IC stops switching and enters the safe restart state.
7.3.8 Overvoltage protection (FBAUX pin)
An output OVP is implemented in the GreenChip series. In the SSL8516T, the auxiliary
voltage is sensed using the current flowing into the FBAUX pin during the secondary
stroke. The auxiliary winding voltage is a well-defined replica of the output voltage. An
internal filter averages voltage spikes.
An internal up-down counter prevents false OVP detection which can occur during ESD or
lightning events. The internal counter counts up by one when the output voltage exceeds
the OVP trip level within one switching cycle. The internal counter counts down by two
when the output voltage has not exceeded the OVP trip level in one switching cycle.
When the counter has reached six, the IC assumes a true overvoltage and triggers the
safe start protection
The demagnetization resistor, RFBAUX sets the output voltage Vo(OVP) at which the OVP
function trips:
(7)
where Ns is the number of secondary windings and Naux is the number of auxiliary
windings of the transformer. Current Iovp(FBAUX) is internally trimmed.
Accurate OVP detection is made possible by adjusting the value of RFBAUX to the turns
ratio of the transformer.
7.3.9 Overcurrent protection (FBSENSE pin)
The primary peak current in the transformer is measured accurately cycle-by-cycle using
the external sense resistor RSENSE2. The OCP circuit limits VFBSENSE to a level set by
VFBCTRL (see also Section 7.3.3). The OCP detection is suppressed during the
leading-edge blanking period, tleb (equals ton(fb)min  td(FBDRIVER)), to prevent false
triggering due to switch-on spikes.
Fig 13. Flyback soft-start
V
oOVP

N
s
N
aux
----------- I
ovp FBAUX

R
FBAUX
V
clamp FBAUX

+

=



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