W5200 datasheet(44/88 Pages) WIZNET

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Set socket memory information

This stage sets the socket tx/rx memory information. The base address and mask address of

each socket are fixed and saved in this stage.

In case of, assign 2KB rx, tx memory per SOCKET

{

gS0_RX_BASE = 0x0000(Chip base address) + 0xC000(Internal RX buffer address); // Set

base address of RX memory for SOCKET 0

Sn_RXMEM_SIZE(ch) = (uint8 *) 2; // Assign 2K rx memory per SOCKET

gS0_RX_MASK = 2K – 1; // 0x07FF, for getting offset address within assigned SOCKET 0

RX memory

gS1_RX_BASE = gS0_RX_BASE + (gS0_RX_MASK + 1);

gS1_RX_MASK = 2K – 1;

gS2_RX_BASE = gS1_RX_BASE + (gS1_RX_MASK + 1);

gS2_RX_MASK = 2K – 1;

gS3_RX_BASE = gS2_RX_BASE + (gS2_RX_MASK + 1);

gS3_RX_MASK = 2K – 1;

gS4_RX_BASE = gS3_RX_BASE + (gS3_RX_MASK + 1);

gS4_RX_MASK = 2K – 1;

gS5_RX_BASE = gS4_RX_BASE + (gS4_RX_MASK + 1);

gS5_RX_MASK = 2K – 1;

gS6_RX_BASE = gS5_RX_BASE + (gS5_RX_MASK + 1);

gS6_RX_MASK = 2K – 1;

gS7_RX_BASE = gS6_RX_BASE + (gS6_RX_MASK + 1);

gS7_RX_MASK = 2K – 1;

gS0_TX_BASE = 0x0000(Chip base address) + 0x8000(InternalTX buffer address); // Set

base address of TX memory for SOCKET 0

Sn_TXMEM_SIZE(ch) = (uint8 *) 2; // Assign 2K rx memory per SOCKET

gS0_TX_MASK = 2K – 1;

/* Same method, set gS1_TX_BASE, gS1_TX_MASK, gS2_TX_BASE, gS2_TX_MASK,

gS3_TX_BASE, gS3_TX_MASK, gS4_TX_BASE, gS4_TX_MASK, gS5_TX_BASE, gS5_TX_MASK,

gS6_TX_BASE, gS6_tx_MASK, gS7_TX_BASE, gS7_TX_MASK */

}

W5200 Datasheet(PDF) 44 Page - WIZnet Co., Ltd