W5200 datasheet(23/88 Pages) WIZNET

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PHYSTATUS(W5200 PHY status Register)[R/W][0x0035][0x00]

PHYSTATUS is the Register to indicate W5200 status of PHY.

Bit

Symbol

Description

Reserved

LINK

Link Status Register[Read Only]

This register indicates Link status.

0 : Link down

1 : Link Up

Power save mode of PHY[Read/Write]2

0 : Disable Power save mode(operates normal mode)

1 : Enable Power save mode

POWERDOWN

Power down mode of PHY[Read/Write]

This register indicates status of Power down mode

0 : Disable Power down mode(operates normal mode)

1 : Enable Power down mode

Reserved

IMR2 (Socket Interrupt Mask Register2) [R/W] [0x0036] [0x00]

The IMR2(Socket Interrupt Mask Register) is used to mask interrupts. Each interrupt mask bit

corresponds to a bit in the Interrupt Register (IR). If an interrupt mask bit is set, an interrupt

will be issued whenever the corresponding bit in the IR is set. If any bit in the IMR2 is set as ‘0’,

an interrupt will not occur though the bit in the IR is set.

IM_IR7

Reserved

IM_IR5

Reserved

Bit

Symbol

Description

IM_IR7

IP Conflict Enable

Reserved

IM_IR5

PPPoE Close Enable

Reserved

2 In this mode, the amplitudes of 10Mbps NLP and FLP will be reduced 3/8 off. And this kind of power

save is only for system level not chip level. This mode is only for 10Mbps mode and the special link-

partner which can accept this kind of link-pulse. If link-partner do not support this kind of link-pulse, we

recommend disabling the power save mode. The default value of power save mode is ‘1’.

W5200 Datasheet(PDF) 23 Page - WIZnet Co., Ltd

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