PIMXRT516SCVJ2A datasheet(27/128 Pages) NXP

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Electrical characteristics

i.MX RT1170 Crossover Processors Data Sheet for Consumer Products, Rev. 1, 05/2021

NXP Semiconductors

Table 11. Operating ranges

Parameter

Description

Symbol

Operating

Conditions

Min

Max1

Unit

Comment

Run Mode

VDD_SOC_IN

Overdrive M7 core at 1

GHz

1.1

1.15

The FBB_DISABLE fuse bit must be

checked on each device to determine

if FBB must be enabled along with

overdrive to operate the M7 core at

frequencies above 700 MHz. If

FBB_DISABLE = 0, then FBB must

be enabled when the SOC domain is

in overdrive mode. If FBB_DISABLE

= 1, then FBB should not be enabled

when the SOC domain is in overdrive

mode.

M7 core at 700 MHz

1.0

1.15

——

M7 core at 240 MHz

0.9

1.15

—

VDD_LPSR_DIG

M4 core at 400 MHz

1.1

1.15

—

M4 core at 240 MHz

1.0

1.15

—

M4 core at 120 MHz

0.9

1.15

—

STANDBY Mode

VDD_SOC_IN

M7 core

0.8

1.15

—

VDD_LPSR_DIG

M4 core

0.8

1.15

—

Power for DCDC

DCDC_IN

—

3.0

3.6

—

Power for PLL,

OSC, and LDOs

VDDA_1P8_IN

—

1.71

1.89

—

Power for LPSR

domain

VDD_LPSR_IN

—

3.0

3.6

—

Power for SNVS

and RTC

VDD_SNVS_IN

—

2.4

3.6

—

Power for USB

OTG PHYs

VDD_USB_1P8

—

1.65

1.95

—

VDD_USB_3P3

—

3.0

3.6

—

Power for ADC,

DAC, and ACMP

VDDA_ADC_1P8

—

1.65

1.95

—

VDDA_ADC_3P3

—

3.0

3.6

—

ADC_VREFH

—

1.0

1.89

—

Power for MIPI

CSI/DSI PHY

VDD_MIPI_1P8

—

1.65

1.95

—

VDD_MIPI_1P0

—

0.9

1.1

—

PIMXRT516SCVJ2A Datasheet(PDF) 27 Page - NXP Semiconductors

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