PIMXRT516SCVJ2A datasheet(37/128 Pages) NXP

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Electrical characteristics

i.MX RT1170 Crossover Processors Data Sheet for Consumer Products, Rev. 1, 05/2021

NXP Semiconductors

•

Need to ensure DCDC_IN ramps to 3.0 V within 0.2 x RC, RC is from external delay circuit used

for DCDC_PSWITCH and must be longer than 1 ms.

•

POR_B (if used) must be held low during the entire power up sequence.

NOTE

The POR_B input (if used) must be immediately asserted at power-up and

remain asserted until after the last power rail reaches its working voltage. In

the absence of an external reset feeding the POR_B input, the internal POR

module takes control. See the i.MX RT1170 Reference Manual

(IMXRT1170RM) for further details and to ensure that all necessary

requirements are being met.

NOTE

The voltage on DCDC_PSWITCH pin should be below 0.5 V before

ramping up the voltage on DCDC_PSWITCH.

NOTE

The power rail VDD_SNVS_DIG is controlled by software.

NOTE

Need to ensure that there is no back voltage (leakage) from any supply on

the board towards the 3.3 V supply (for example, from the external

components that use both the 1.8 V and 3.3 V supplies).

NOTE

USB1_VBUS, USB2_VBUS, and VDDA_ADC_3P3 are not part of the

power supply sequence and may be powered at any time.

4.2.1.2

Power-down sequence

The following restrictions must be followed:

•

VDD_SNVS_IN supply must be turned off after any other power supply or be connected (shorted)

with VDD_LPSR_IN and DCDC_IN supply.

•

If a coin cell is used to power VDD_SNVS_IN, then ensure that it is removed after any other supply

is switched off.

4.2.1.3

Power supplies usage

I/O pins should not be externally driven while the I/O power supply for the pin (NVCC_XXXX) is OFF.

This can cause internal latch-up and malfunctions due to reverse current flows. For information about I/O

power supply of each pin, see “Power Rail” columns in pin list tables of Section 6, Package information

and contact assignments.”

PIMXRT516SCVJ2A Datasheet(PDF) 37 Page - NXP Semiconductors

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