LTC4162EUFD-FST#PBF datasheet(23/52 Pages) AD

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LTC4162-F

Rev A

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OPERATION

Thisallowsthesystemtohavemanypartsshareacommon

interruptline.IfmultiplepartsareassertingtheSMBALERT

signal then multiple reads from the ARA are needed. For

more information refer to the SMBus specification.

After the ARA process is complete, alert bits can be cleared

by individually writing them to 0 and writing the remaining

bits in the register to 1. This preserves any other pending

alert bits as writing 1s to the alert registers are ignored.

Series Cell Count Selection

Cell count selection of up to eight series cells is made via

theCELLS1andCELLS0pins. CELLS1andCELLS0should

be pin strapped to either GND, VCC2P5, or INTVCCtomake

the cell_count selection (see Table 5). For added safety,

cell_count can be read back from the I2C port. The GND/

GND combination will result in a cell_count_err and will

inhibit charging. Note that the number of cells multiplied

by their expected maximum cell voltage during charging

cannot exceed VIN – VIN_DUVLO.

Table 5. CELLS0 and CELLS1 Pin Mapping to Series Cell Count

CELLS1

CELLS0

cell_count

INTVCC

VCC2P5

INTVCC

GND

VCC2P5

INTVCC

VCC2P5

GND

INTVCC

GND

VCC2P5

GND

When charging stacks of two or more cells in series it is

importanttoconsultwiththebatterymanufacturertoascer-

tain requirements pertaining to cell balancing. Repeatedly

charging series stacks of cells without balancing is usually

degenerative and typically leads to increased mismatch

accompanied with shorter battery life. For high reliability

applicationsanauxiliarybatterybalancerisrecommended.

Battery Detection

The LTC4162 begins a charging cycle by performing a 2-4

second battery detection test, during which a 1mA load is

drawn from the battery followed by a small charge current

being sent to the battery. If the battery voltage remains

stable during the battery detection test, the LTC4162

proceeds with battery charger soft-start. If the battery

voltage does not remain stable, the LTC4162 proceeds

with a battery open/short test. The battery is charged at

minimum charge current for one to two seconds. Abnor-

mal results from the battery detection test result in char-

ger_statebecomingbat_missing_fault,bat_short_faultor

bat_detect_failed_fault and will prevent further charging.

A charger_state of bat_missing_fault will also occur if

the thermistor is open or has a very high value (thermis-

tor_voltage>open_thermistor).Programmableinterrupts

en_bat_short_fault_alert,en_bat_missing_fault_alertand

en_bat_detect_failed_fault_alert can be set to generate an

SMBALERT if one of these cases occurs. In the event of a

battery detection fault, the battery detection test will retry

every 30 seconds.

Battery Charger Soft-Start

The LTC4162 soft starts charge current by ramping ich-

arge_dac from 0 to its target charge current setting at a

nominal rate of 400µS per icharge_dac LSB. This results

in a maximum charge current soft start time of 31 • 400µs

or 12.4ms. Any time the battery charger needs to change

its charge current setting up or down, the ramp routine is

invoked. The charge current target is derived from either

charge_current_settingortheJEITAtemperaturequalified

chargingsystem,icharge_jeita_2 through icharge_jeita_6

(See Advanced JEITA Temperature Controlled Charging).

Low Battery

If the BATSENS+ pin voltage is lower than about 2.5V,

the battery charger delivers roughly 10mA directly from

INTVCC. This operating mode is mainly used to pull a

pack protected battery out of protection mode. When the

BATSENS+ pin voltage reaches 2.5V, charging hands over

to the switching battery charger and proceeds to the full

constant-current/constant-voltagechargingphasereport-

ing cc_cv_charge.

LTC4162EUFD-FST#PBF Datasheet(PDF) 23 Page - Analog Devices

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