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LTC4162EUFD-FST#PBF Datasheet(PDF) 32 Page - Analog Devices |
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LTC4162EUFD-FST#PBF Datasheet(HTML) 32 Page - Analog Devices |
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32 / 52 page ![]() 32 LTC4162-F Rev A For more information www.analog.com APPLICATIONS INFORMATION series resistance (ESR) multilayer ceramic capacitors be used to bypass VOUT. Tantalum and aluminum capacitors will not work because of their high ESR and ESL. The value of the total capacitance on VOUT directly controls the amount of input ripple for a given load current. Increas- ing the size of this capacitor will reduce the input ripple. The LTC4162 has been designed with VOUT and PGND as two corner pin groups so there is ample room to fit an appropriatebypasscapacitor.Theneedforlowimpedance capacitance directly adjacent to the VOUT and PGND pins cannot be overemphasized. PCB distance of only a few millimeters will introduce nano-Henrys of inductance and compromise the high frequency "hot-loop" (See Printed Circuit Board Layout Considerations). It is also recommended that a ceramic capacitor be used to bypass BATSENS+. At least 10µF with low ESR is re- quired. Multilayer ceramic chip capacitors typically have exceptional ESR performance. MLCCs combined with a tight board layout and an unbroken ground plane will yield very good performance and low EMI emissions. The INTVCC and VCC2P5 pins are the outputs of onboard lowdropoutregulatorsandalsorequireceramiccapacitors. The INTVCC and VCC2P5 capacitors should be as close to the LTC4162 as possible and returned immediately to an analog ground plane. The INTVCC pin requires at least 4.7µF of capacitance rated to at least 6.3V and the VCC2P5 pin requires at least 1µF rated to 4V. The actual capacitance of any ceramic capacitor should be measured with a small AC signal and DC bias, as is expected in-circuit. Many vendors specify the capacitance versus voltage with a 1VRMS AC test signal with no bias and, as a result, grossly overstate the capacitance that the capacitor will present in the application. Using similar operating conditions as the application, the user must measure,orrequestfromthevendor,theactualcapacitance to determine if the selected capacitor meets the minimum capacitance that the application requires. INFET and BATFET MOSFET Selection An external N-channel MOSFET is required for both the input and battery paths. Important parameters for the se- lection of these MOSFETs are the maximum drain-source voltage, VDSS, gate threshold voltage and on-resistance (RDS(ON)). When the input is grounded, the battery stack voltage is applied across the input MOSFET. When VBAT is at 0V, the input voltage is applied across the battery MOSFET. Therefore, the VDSS of the input MOSFET must withstand the maximum voltage on VBAT while the VDSS of the output MOSFET must withstand the highest voltage on VIN. The gate drive for both is 5V. This requires the use of logic-level threshold N-channel MOSFETs. As a general rule, select MOSFETs with a low enough RDS(ON) to obtain the desired VDS and power dissipation while operating at full load current. Operation Without a Battery The LTC4162 has built in battery detection. Its switching regulator will generally not start if the battery is missing. However,ifabatteryispresentatthebeginningofacharge cycle and is removed, the LTC4162 will operate without a battery. Typically the BATSENS+ pin will rise quickly to the programmed constant-voltage level and remain there. However, it is important that the impedance on the BATSENS+ node be kept relatively low at the switching frequency. Therefore a ceramic capacitor of 10µF or more near the LTC4162 is necessary. Note that without a load on the BATSENS+ pin, the switching regulator will eventually terminate due to tcvtimer reaching max_cv_time. Operation With Long Battery Leads The LTC4162 is generally resilient to operation with long battery leads, however a ceramic capacitor of 10µF or more of appropriate voltage tolerance near the LTC4162 is necessary. Note that any parasitic battery resistance, such as long cabling, will push the LTC4162 into constant voltage charging sooner, dramatically extending charging |
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