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LTC4162EUFD-FST#PBF Datasheet(PDF) 43 Page - Analog Devices

Part # LTC4162EUFD-FST#PBF
Description  35V/3.2A Multicell LiFePO4 Step-Down Battery Charger with PowerPath and I2C Telemetry
PDF  52 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

LTC4162EUFD-FST#PBF Datasheet(HTML) 43 Page - Analog Devices

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LTC4162-F
Rev A
For more information www.analog.com
Symbol Name
Command
Code
Access
Bit
Range
Default Description
charger_state
0x34
R
[12:0]
256
Real time battery charger state indicator. Individual bits are mutually exclusive.
Enums: bat_detect_failed_fault = 4096,
battery_detection = 2048,
absorb_charge = 512,
charger_suspended = 256,
cc_cv_charge = 64,
ntc_pause = 32,
timer_term = 16,
c_over_x_term = 8,
max_charge_time_fault = 4,
bat_missing_fault = 2,
bat_short_fault = 1
charge_status
0x35
R
[5:0]
0
Charge status indicator. Individual bits are mutually exclusive and are only active in
charging states.
Enums: ilim_reg_active = 32,
thermal_reg_active = 16,
vin_uvcl_active = 8,
iin_limit_active = 4,
constant_current = 2,
constant_voltage = 1,
charger_off = 0
LIMIT_ALERTS_
REG
0x36
R
[15:0]
0
Limitalertregister.Thisinput/outputregisterindicatesthatanenabledalerthasoccurred.
Individual alerts are enabled in EN_LIMIT_ALERTS_REG. Writing 0 to any bit clears that
alert. Once set, alert bits remain high until cleared or disabled.
telemetry_valid_
alert
[15]
0
Alert that indicates that the telemetry system warm-up time has expired and valid
telemetry data is available from the serial port. This alert bit is cleared by writing it back
to 0 with the remaining bits in this register set to 1s. It can also be cleared by clearing
en_telemetry_valid_alert.
bsr_done_alert
[14]
0
Alert that indicates that the battery equivalent-series-resistance measurement is finished
and a result is available in bsr. This alert bit is cleared by writing it back to 0 with the
remainingbitsinthisregistersetto1s.Itcanalsobeclearedbyclearingen_bsr_done_alert.
vbat_lo_alert
[11]
0
Alert that indicates that vbat is below the value set by vbat_lo_alert_limit. This alert bit
is cleared by writing it back to 0 with the remaining bits in this register set to 1s. It can
also be cleared by clearing en_vbat_lo_alert.
vbat_hi_alert
[10]
0
Alert that indicates that vbat is above the value set by vbat_hi_alert_limit. This alert bit
is cleared by writing it back to 0 with the remaining bits in this register set to 1s. It can
also be cleared by clearing en_vbat_hi_alert.
vin_lo_alert
[9]
0
Alert that indicates that vin is below the value set by vin_lo_alert_limit. This alert bit is
cleared by writing it back to 0 with the remaining bits in this register set to 1s. It can
also be cleared by clearing en_vin_lo_alert.
vin_hi_alert
[8]
0
Alert that indicates that vin is above the value set by vin_hi_alert_limit. This alert bit is
cleared by writing it back to 0 with the remaining bits in this register set to 1s. It can
also be cleared by clearing en_vin_hi_alert.
vout_lo_alert
[7]
0
Alert that indicates that vout is below the value set by vout_lo_alert_limit. This alert bit
is cleared by writing it back to 0 with the remaining bits in this register set to 1s. It can
also be cleared by clearing en_vout_lo_alert.
REGISTER DESCRIPTIONS



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