LTC4162EUFD-FST#PBF datasheet(6/52 Pages) AD

6 / 52 page

LTC4162-F

Rev A

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Note 1: Stresses beyond those listed under Absolute Maximum Ratings

may cause permanent damage to the device. Exposure to any Absolute

Maximum Rating condition for extended periods may affect device

reliability and lifetime.

Note 2: The LTC4162 includes over-temperature protection that is

intended to protect the device during momentary overload conditions.

The maximum rated junction temperature will be exceeded when this

protection is active. Continuous operation above the specified absolute

maximum operating junction temperature may impair device reliability or

permanently damage the device.

Note 3: The safety current limit features of this part are intended to

protect the IC from short term or intermittent fault conditions. Continuous

operation above the maximum specified pin current may result in device

degradation or failure.

Note 4: The E-grade is tested under pulsed load conditions such that

TJ ≈ TA. The E-grade is guaranteed to meet specifications from 0°C

to 85°C junction temperature. Specifications over the –40°C to 125°C

operating junction temperature range are assured by design,

characterization, and correlation with statistical process controls. The

I-grade is guaranteed over the full –40°C to 125°C operating junction

temperature range. The junction temperature (TJ) is calculated from the

ambient temperature (TA) and power dissipation (PD) according to the

formula TJ = TA + (PD • θJA). Note that the maximum ambient temperature

consistent with these specifications is determined by specific operating

conditions in conjunction with board layout, the rated package thermal

resistance and other environmental factors.

Note 5: Charge Current is given by the charger servo voltage, VCSP-CSN,

divided by the charge current setting resistor RSNSB. Errors in the value of

the external resistor contribute directly to the total charge current error.

Note 6: Input Current is given by the VCLP-CLN servo voltage divided by

the input current setting resistor RSNSI. Errors in the value of the external

resistor contribute directly to the total input current error.

The l denotes the specifications which apply over the full specified

operating junction temperature range, otherwise specifications are at TA = 25°C (Note 4). VIN = 18V, DVCC = 3.3V, RSNSI = 10mΩ,

RSNSB = 10mΩ unless otherwise noted.

SYMBOL

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

tLOW

LOW Period of SCL Clock

1.3

µs

tHIGH

HIGH Period of SCL Clock

0.6

µs

tBUF

Bus Free Time Between Start and Stop

Conditions

1.3

µs

tHD,STA

Hold Time, After (Repeated) Start

Condition

0.6

µs

tSU,STA

Setup Time after a Repeated Start

Condition

0.6

µs

tSU,STO

Stop Condition Set-Up Time

0.6

µs

tHD,DAT(OUT)

Output Data Hold Time

900

tHD,DAT(IN)

Input Data Hold Time

tSU,DAT

Data Set-Up Time

100

tSP

Input Spike Suppression Pulse Width

SYNC Pin

VIHSYNC

Input High Threshold

1.5

VILSYNC

Input Low Threshold

0.2

Pin Leakages (NTC, CELLS0, CELLS1, SDA, SCL, SYNC, SMBALERT)

Pin Current

–50

ELECTRICAL CHARACTERISTICS

LTC4162EUFD-FST#PBF Datasheet(PDF) 6 Page - Analog Devices

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