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LTC4162EUFD-FST#PBF Datasheet(PDF) 28 Page - Analog Devices

Part # LTC4162EUFD-FST#PBF
Description  35V/3.2A Multicell LiFePO4 Step-Down Battery Charger with PowerPath and I2C Telemetry
PDF  52 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

LTC4162EUFD-FST#PBF Datasheet(HTML) 28 Page - Analog Devices

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LTC4162-F
Rev A
For more information www.analog.com
OPERATION
Absorb (Rapid) Charging
The LTC162 can optionally perform an accelerated ab-
sorb, or rapid, charge phase if vabsorb_delta is greater
than zero. During the absorb phase the battery terminal
voltage is allowed to rise vabsorb_delta above the normal
constant_voltagelevelforuptoadefaultmax_absorb_time
of 900 seconds or 15 minutes. Note that depending on
batterystateofcharge,chargecurrentandseriesresistance
the battery terminal voltage may not necessarily reach
the increased absorb voltage during the tabsorbtimer
period. The vabsorb_delta default of 0 inhibits the rapid
charging phase.
Low Power Ship Mode
The LTC4162 can reduce its already low battery-only
standby current to about 2.8µA in a special mode designed
for shipment and storage. Ship mode is armed by setting
arm_ship_mode to arm. It does not take effect, however,
until the input voltage VIN drops below approximately 1V.
Uponreturnoftheinputvoltageaboveapproximately1Vthe
LTC4162wakesfromshipmode.Thedecisiontoremainout
of ship mode is latched once the internal voltage reference
is re-biased and VIN is detected as having reached about
4.2V (vin_gt_4p2v). In ship mode, the VCC2P5 2.5V logic
LDO and the INTVCC 5V system LDO are deactivated and,
along with them, all logic and communications with the
I2C port. Consequently, no settings or state information
will persist through a ship mode cycle.
Oscillator Synchronization
The SYNC pin is available to synchronize the switching
battery charger to an external clock for optimum noise
immunity. To use the SYNC pin, use the RT pin to set
the frequency of the internal oscillator to the frequency
expected by the SYNC signal. If no signal is present at
SYNC, the internal oscillator will run normally. If a signal
within the required tolerance range appears at SYNC, the
internal oscillator will detect it and synchronize with it. To
avoid a long or short cycle, synchronization won't occur
until the internal oscillator and external signals coincide.
Therefore, synchronization may take several thousand
cycles (milliseconds) to occur. If SYNC is not used, it
should just be grounded.
Under Voltage Lockout Circuits/suspend_charger/
System Faults
Various supply monitor circuits, as well as suspend_char-
ger, can disable charging. If the voltage at VIN falls below
BATSENS+ (i.e. not vin_gt_vbat), or thermal_shutdown
(die temperature above ~150°C), no_rt resistor, not
intvcc_gt_2p8v, not vin_gt_4p2v, or a CELLS0/1 pins
cell_count_err, the LTC4162 suspends charging and
reports charger_suspended. In the absence of any of the
above fault conditions, charging is re-enabled when VIN
rises VIN_DUVLO above the BATSENS+ voltage.
LTC4162 Lithium Iron Phosphate Variants
The LTC4162-FAD is fully programmable and follows the
descriptions given thus far but there are two other variants
available as well. Each of these three versions is available
with and without solar panel maximum power tracking
enabled by default.
The other LTC4162 lithium iron phosphate variants are:
LTC4162-FST
LTC4162-FFS
The LTC4162-FST is identical to the LTC4162-FAD but,
for improved safety, the JEITA values as well as v_re-
charge_lifepo4, vabsorb_delta and max_absorb_time are
not writable.
The LTC4162-FFS variant enables the absorb_charge
(rapid) feature by having a default vabsorb_delta of 16
representing 200mV/cell_count above the normal charg-
ing voltage. In the LTC4162-FFS variant the JEITA values,
v_recharge_lifepo4,vabsorb_deltaandmax_absorb_time
are also not writable.



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