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ADP5360ACBZ-2-R7 Datasheet(PDF) 50 Page - Analog Devices

Part # ADP5360ACBZ-2-R7
Description  Advanced Battery Management PMIC with Ultra Low Power Buck and Buck Boost
PDF  60 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

ADP5360ACBZ-2-R7 Datasheet(HTML) 50 Page - Analog Devices

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ADP5360
Data Sheet
Rev. 0 | Page 50 of 60
Bit(s)
Bit Name
Access
Default
Description
[5:0]
VOUT_BUCKBST[5:0]
R/W
Factory set
Buck Boost Output Voltage Setting. The values of the voltage setting can be
programmed by using the following values:
000000 = 1.8 V with 100 mV step.
000001 = 1.9 V with 100 mV step.
001011 = 2.9 V with 100 mV step.
001100 = 2.95 V with 50 mV step.
111111 = 5.5 V with 50 mV step.
SUPERVISORY REGISTER BIT DESCRIPTIONS
Table 63. Supervisory Setting, Address 0x2D Bit Descriptions
Bit(s)
Bit Name
Access Default
Description
7
VOUT1_RST
R/W
1
Buck Output Voltage Monitor to RESET Selection.
0 = disable buck voltage monitor to RESET.
1 = enable buck voltage monitor to RESET.
6
VOUT2_RST
R/W
0
Buck Boost Output Voltage Monitor to RESET Selection.
0 = disable buck boost voltage monitor to RESET.
1 = snable buck boost voltage monitor to RESET.
5
RESET_TIME
R/W
0 = 200 ms
RESET Timeout Period Selection. The values of the period selection can be programmed
by using the following values:
0 = 200 ms.
1 = 1.6 sec.
[4:3]
WD_TIME[1:0]
R/W
00 = 12.5 sec
Watchdog Timeout Period Selection. The values of the period selection can be
programmed by using the following values:
00 = 12.5 sec.
01 = 25.6 sec.
10 = 50 sec.
11 = 100 sec.
2
EN_WD
R/W
0 = disable
When high, the watchdog timer function is enabled. When low, the watchdog timer
function is disabled.
1
EN_MR_SD
R/W
0 = disable
When high, the device enters shipment mode after MR presses low for 12 sec. When
low, disable MR to enter shipment mode.
0
RESET_WD
W
0
When high, the watchdog safety timer resets. The RESET_WD bit is reset automatically.
STATUS AND FAULT REGISTER BIT DESCRIPTIONS
Table 64. Fault, Address 0x2E Bit Descriptions1
Bit(s)
Bit Name
Access
Default
Description
7
BAT_UV1
R/W
0
When high, this bit indicates that the battery is undervoltage when overdischarging.
6
BAT_OC1
R/W
0
When high, this bit indicates that the battery is overcurrent during overdischarge.
5
BAT_CHGOC1
R/W
0
When high, this bit indicates that the battery is overcurrent during overcharge.
4
BAT_CHGOV1
R/W
0
When high, this bit indicates that the battery is overvoltage during overcharge.
3
Reserved
R
Not applicable
Reserved
.
2
WD_TIMEOUT1
R/W
0
When high, watchdog timeout occurred.
1
Reserved
R/W
0
Reserved.
0
TSD1101
R/W
0
When high, the temperature shutdown fault occurs.
1 To reset the fault bits in the fault register, cycle power on the VBUS pin or write high to the corresponding bits of the fault register.



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