AS3911 datasheet(41/159 Pages) AMSCO

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ams Datasheet

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[v2-11] 2016-Jun-13

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AS3911 − Application Information

Writing of Data to Addressable Registers (Write

Mode)

Following figures show cases of writing a single byte and

writing multiple bytes with auto-incrementing address. After

the SPI operation mode bits, the address of register to be

written is provided. Then one or more data bytes are transferred

from the SPI, always from the MSB to the LSB. The data byte is

written in register on falling edge of its last clock. In case the

communication is terminated by putting /SS high before a

packet of 8 bits composing one byte is sent, writing of this

address does not exist or it is a read only register no write is

performed.

Figure 26:

SPI Communication: Writing of Single Byte

Figure 27:

SPI Communication: Writing of Multiple Bytes

SCLK rising

edge Data is

transfered

from µC

SCLK falling

edge Data is

sampled

Data is moved to

Address

A5-A0

/SS rising edge

signals end of

WRITE Mode

Two leading

bits indicate

Mode

/SS

SCLK

MOSI

Data is moved to

Address

<A5-A0> + n

/SS rising edge

signals end of

WRITE Mode

Two leading

bits indicate

Mode

Data is moved to

Address

<A5-A0> + (n-1)

Data is moved to

Address

<A5-A0> + 1

Data is moved

to Address

<A5-A0>

/SS

SCLK

MOSI

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