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STM8L051F3 Datasheet(PDF) 83 Page - STMicroelectronics |
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STM8L051F3 Datasheet(HTML) 83 Page - STMicroelectronics |
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83 / 96 page  DS9178 Rev 4 83/96 STM8L051F3 Electrical parameters 87 Figure 33. ADC1 accuracy characteristics Figure 34. Typical connection diagram using the ADC 1. Refer to Table 47 for the values of RAIN and CADC. 2. Cparasitic represents the capacitance of the PCB (dependent on soldering and PCB layout quality) plus the pad capacitance (roughly 7 pF). A high Cparasitic value will downgrade conversion accuracy. To remedy this, fADC should be reduced. Figure 35. Maximum dynamic current consumption on VREF+ supply pin during ADC conversion ai17090f STM8 IL± 50nA 12-bit converter Sample and hold ADC converter VAIN RAIN (1) AINx VDD VT 0.6V VT 0.6V Cparasitic (2) RADC CADC (1) MS46324V1 Sampling (n cycles) Conversion (12 cycles) ADC clock Iref+ 700 μA 300 μA |
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