 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
STM8L051F3 Datasheet(PDF) 84 Page - STMicroelectronics |
|
|
|||||||||||||||||||||||||||||
STM8L051F3 Datasheet(HTML) 84 Page - STMicroelectronics |
|
|
84 / 96 page  Electrical parameters STM8L051F3 84/96 DS9178 Rev 4 General PCB design guidelines Power supply decoupling should be performed as shown in Figure 36 or Figure 37, depending on whether VREF+ is connected to VDDA or not. Good quality ceramic 10 nF capacitors should be used. They should be placed as close as possible to the chip. Figure 36. Power supply and reference decoupling (VREF+ not connected to VDDA) Table 47. RAIN max for fADC = 16 MHz(1) 1. Guaranteed by design. Ts (cycles) Ts (µs) RAIN max (kohm) Slow channels 2.4 V < VDDA < 3.6 V 1.8 V < VDDA < 2.4 V 4 0.25 Not allowed Not allowed 9 0.5625 0.8 Not allowed 16 1 2.0 0.8 24 1.5 3.0 1.8 48 3 6.8 4.0 96 6 15.0 10.0 192 12 32.0 25.0 384 24 50.0 50.0 Supply External reference STM8L VREF+ VDDA VSSA/VREF- 1 μF // 10 nF 1 μF // 10 nF ai17031c |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
