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STM8L051F3 Datasheet(PDF) 25 Page - STMicroelectronics |
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STM8L051F3 Datasheet(HTML) 25 Page - STMicroelectronics |
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25 / 96 page ![]() DS9178 Rev 4 25/96 STM8L051F3 Pin description 41 Note: 1 The slope control of all GPIO pins, except true open drain pins, can be programmed. By default, the slope control is limited to 2 MHz. 4.1 System configuration options As shown in Table 4: STM8L051F3 pin description, some alternate functions can be remapped on different I/O ports by programming one of the two remapping registers described in the “Routing interface (RI) and system configuration controller” section in the STM8L050J3, STM8L051F3, STM8L052C6, STM8L052R8 MCUs and STM8L151/L152, STM8L162, STM8AL31, STM8AL3L lines reference manual (RM0031). 2 PC6/OSC32_OUT/[SPI_SCK](2) /[USART_RX]/[TIM2_CH2] I/O - X XX HS X X Port C6 LSE oscillator output / [SPI clock] / [USART receive]/ Timer 2 -channel 2 9 PD0/TIM3_CH2/[ADC1_TRIG](2 )/ADC1_IN22 I/O - X XX HS X X Port D0 Timer 3 - channel 2 / [ADC1_Trigger] / ADC1_IN22 8VDD / VDDA / VREF+ S- Digital supply voltage / ADC1 positive voltage reference 7VSS / VREF- / VSSA - Ground voltage / ADC1 negative voltage reference / Analog ground voltage 3 PA0(5)/[USART_CK](2)/ SWIM/BEEP/IR_TIM (6) I/O - X X X HS (6) XX Port A0 [USART1 synchronous clock](2) / SWIM input and output / Beep output / Infrared timer output 1. At power-up, the PA1/NRST pin is a reset input pin with pull-up. To be used as a general purpose pin (PA1), it can be configured only as output open-drain or push-pull, not as a general purpose input. Refer to Section Configuring NRST/PA1 pin as general purpose output in the STM8L051/L052 Value Line, STM8L151/L152, STM8L162, STM8AL31, STM8AL3L MCU lines reference manual (RM0031). 2. [ ] Alternate function remapping option (if the same alternate function is shown twice, it indicates an exclusive choice not a duplication of the function). 3. A pull-up is applied to PB0 and PB4 during the reset phase. These two pins are input floating after reset release. 4. In the open-drain output column, ‘T’ defines a true open-drain I/O (P-buffer and protection diode to VDD are not implemented). 5. The PA0 pin is in input pull-up during the reset phase and after reset release. 6. High Sink LED driver capability available on PA0. Table 4. STM8L051F3 pin description (continued) pin n° Pin name Input Output Default alternate function |
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