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AIS2DW12 Datasheet(PDF) 45 Page - STMicroelectronics |
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AIS2DW12 Datasheet(HTML) 45 Page - STMicroelectronics |
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45 / 60 page ![]() DocID031240 Rev 4 45/60 AIS2DW12 Register description 60 8.9 CTRL6 (25h) Control register 6 (r/w) Table 40. Control register 6 Table 41. Control register 6 description Table 42. Digital filtering cutoff selection (FDS bit set to ‘0’) Table 43. LPF1 cutoff (FDS bit set to '0') Table 44. Digital high-pass filter cutoff selection (FDS bit set to ‘1’) Table 45. Full-scale selection BW_FILT1 BW_FILT0 FS1 FS0 FDS 0 0 0 BW_FILT[1:0] Bandwidth selection (see Table 42) FS[1:0] Full-scale selection (see Table 45) FDS Filtered data type selection. Default value: 0 (0: low-pass filter path selected; 1: high-pass filter path selected) BW_FILT[1:0] Bandwidth selection 00 LPF1 only refer to Table 43: LPF1 cutoff (FDS bit set to '0') 01 ODR/4 10 ODR/10 11 ODR/20 Mode ODR selection Cutoff [Hz] Low-Power Mode 4 @ each ODR 180 Low-Power Mode 3 @ each ODR 360 Low-Power Mode 2 @ each ODR 720 Low-Power Mode 1 @ each ODR 3200 BW_FILT[1:0] Bandwidth selection 00 ODR/4 01 ODR/4 10 ODR/10 11 ODR/20 FS[1:0] Full-scale selection 00 ±2 g 01 ±4 g |
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