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XM014532A Datasheet(PDF) 86 Page - Xmos Ltd.

Part # XM014532A
Description  XCore xcore.ai Microcontroller IC 32-Bit 16-Core 2400MIPs 8KB (8K x 8) OTP 128-TQFP (14x14)
PDF  99 Pages
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Manufacturer  XMOS [Xmos Ltd.]
Direct Link  https://www.xmos.ai/
Logo XMOS - Xmos Ltd.

XM014532A Datasheet(HTML) 86 Page - Xmos Ltd.

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XU6--TQ8 Datasheet
D.6
Padcontrol LPDDR DQ-DQ
PADCTRL_DQ 0xD008
When LPDDR is enabled, this register controls the PAD properties for the DQ-DQ pins
Bits
Perm
Init
Description
Identier
:
RO
-
Reserved
6
RW
Set to to enable the schmitt trigger
PADCTRL_SCHMITT_TRIGGER_ENABLE
RW
Set to to enable slew-rate control
PADCTRL_SLEW_RATE_CONTROL
:
RW
Pad drive strength:
for mA;
for mA;
for 8 mA; or
for
mA.
PADCTRL_DRIVE_STRENGTH
:
RW
Pull resistor:
for none;
for weak pull-up;
for weak pull-down; or
for weak bus-keep.
PADCTRL_PULL
RW
Set to to enable the input receiver
PADCTRL_RECEIVER_ENABLE
xD8:
Padcontrol
LPDDR
DQ-DQ
D.6
Padcontrol LPDDR UDQS/LDQS
PADCTRL_DQS 0xD009
When LPDDR is enabled, this register controls the PAD properties for the UDQS and LDQS
pins
Bits
Perm
Init
Description
Identier
:
RO
-
Reserved
6
RW
Set to to enable the schmitt trigger
PADCTRL_SCHMITT_TRIGGER_ENABLE
RW
Set to to enable slew-rate control
PADCTRL_SLEW_RATE_CONTROL
:
RW
Pad drive strength:
for mA;
for mA;
for 8 mA; or
for
mA.
PADCTRL_DRIVE_STRENGTH
:
RW
Pull resistor:
for none;
for weak pull-up;
for weak pull-down; or
for weak bus-keep.
PADCTRL_PULL
RW
Set to to enable the input receiver
PADCTRL_RECEIVER_ENABLE
xD:
Padcontrol
LPDDR
UDQS/LDQS
D.6
Padcontrol LPDDR UDM/LDM
PADCTRL_DM 0xD00A
When LPDDR is enabled, this register controls the PAD properties for the UDM and LDM
pins
8



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