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XM014532A Datasheet(PDF) 76 Page - Xmos Ltd. |
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XM014532A Datasheet(HTML) 76 Page - Xmos Ltd. |
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76 / 99 page  XU6--TQ8 Datasheet Bits Perm Init Description Identier :6 RO - Reserved : RO This is the current count of the prescaler. One is added one every in- put clock edge on the oscillator (XIN). When it reaches the prescaler wrap value (see below), it resets to zero and one is subtracted from the watchdog count (see below). WATCHDOG_PRESCALER_VALUE xF: Watchdog Prescaler D. Watchdog Prescaler wrap WATCHDOG_PRESCALER_WRAP 0xF022 Register to set the watchdog pre-scale divider value. Bits Perm Init Description Identier :6 RO - Reserved : RW xFFFF This is the prescaler divider. The input clock on XIN is divided by this value plus one, before being used to adjust the watchdog count (see below). WATCHDOG_PRESCALER_WRAP_VALUE xF: Watchdog Prescaler wrap D. Watchdog Count WATCHDOG_COUNT 0xF023 Register to set the value at which the watchdog timer should time out. This register must be overwritten regularly to stop the watchdog from resetting the chip. Bits Perm Init Description Identier : RO - Reserved : RW xFFF This is the watchdog counter. It counts down every PRESCALER_WRAP_VALUE input clock edges. When it reaches zero the chip is reset. The maximum time for the watchdog is 212 × 216 = 228 = 268, 435, 456 input clocks. WATCHDOG_COUNT_VALUE xF: Watchdog Count D. Watchdog Status WATCHDOG_STATUS 0xF024 Register that can be used to inspect whether the watchdog has triggered. Bits Perm Init Description Identier : RO - Reserved RO When , the watchdog has been triggered. This bit is only reset to on a power-on-reset. WATCHDOG_HAS_TRIGGERED xF: Watchdog Status |
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