DA9062 datasheet(45/101 Pages) RENESAS

45 / 101 page

DA9062

PMIC for Applications Requiring up to 8.5 A

Datasheet

Revision 3.8

15-Feb-2022

CFR0011-120-00

45 of 99

8.7.6

Operating Mode

The operating mode of each converter can be set via the buck register (BUCK<x>_MODE) to

synchronous (PWM), sleep (PFM), or auto. In auto mode the buck converter switches between PWM

and PFM depending on the load current. The current consumption during PWM operation is 10 mA

and drops to <1 µA in shutdown.

Note

It is not recommended that the Auto mode transition feature is used under certain operating conditions.

Customers wishing to use the Auto mode transition feature should first check with their Dialog FAE.

In addition, the buck mode can be controlled with the A and B setting. If BUCK<x>_SL_B is set, the

buck is forced to SLEEP mode when the B setting is active. Similarly, if BUCK<x>_SL_A is set, the

buck is forced to SLEEP mode when the A setting is active.

8.7.7

Half-Current Mode

Buck1 and Buck2 can operate in half-current mode where the quiescent current is reduced by

disabling half of the pass devices. As the name implies, enabling this option halves the output

current, and therefore, this feature is valuable in applications where quiescent current is critical and

full current is not needed. This feature is controlled with BUCK1_FCM and BUCK2_FCM. If the bit is

asserted (BUCK<x>_FCM = 1), the corresponding buck is in full-current mode and the full current is

available. If the bit is de-asserted, the corresponding buck is in half-current mode. Operating the

bucks in full-current mode requires twice as much output capacitance (2 x 47 µF) as the half-current

mode (2 x 22 µF).

8.7.8

Buck1 and Buck2 in Dual-Phase Mode

Buck1 and Buck2 can be merged as a dual-phase buck, with up to 5 A output current. If enabled in

OTP via BUCK1_2_MERGE, the outputs from both inductors must be routed together. The controls

for Buck2 are automatically disabled in this configuration, except for BUCK2_PD_DIS.

8.7.9

Buck4 in DDR Memory Bus Termination Mode

Buck4 can be used to generate the DDR memory termination voltage, VTT. In this mode, Buck4

tracks the divided VDDQ voltage and it is able to both sink and source current. As described in

Section 8.3.5, GPIO0 can be configured to carry the VDDQ and GPIO1 can be configured to carry

the VTTR signal. The VTTR output provides buffered version of the VDDQ/2 voltage with ±10 mA

source/sink capability (requires 0.1 µF stabilization capacitor), see Figure 20. When used for memory

termination, Buck4 has to be configured with BUCK4_MODE = 00 and BUCK4_SL_<x> = 0. If

BUCK4_VTT_EN and BUCK4_VTTR_EN are asserted at the same time, the VTTR provides a

buffered VTT reference, but otherwise Buck4 is running in a normal output voltage control mode.

Buck4

Buck

control

DAC

VBUCK4

VLX_BUCK4

VTT (±700 mA)

VDDQ

GPIO0

VTTR (±10 mA)

GPIO1

VBUCK4

VDD_BUCK4

BUCK4_VTT_EN

VREF

Figure 20: Buck4 DDR Memory Bus Termination Mode

DA9062 Datasheet(PDF) 45 Page - Renesas Technology Corp

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