ADP3186 datasheet(14/24 Pages) AD

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ADP3186

Rev. A | Page 14 of 24

APPLICATION INFORMATION

The design parameters for a typical AMD Opteron CPU

application are as follows:

•

Input voltage (VIN) = 12 V

•

VID setting voltage (VVID) = 1.500 V

•

Duty cycle (D) = 0.125

•

Maximum static output voltage error (±VSRER) = ±50 mV

•

Maximum dynamic output voltage error (±VDRER) = ±70 mV

•

Error voltage allowed for controller and ripple (±VRERR) =

±20 mV

•

Maximum output current (IO) = 56 A

•

Maximum output current step (ΔIO) = 24 A

•

Static output drop resistance (RO) based on

No load output voltage set at upper output voltage

limit.

VONL = VVID + VSERR – VRERR = 1.530 V

Full load output voltage set at lower output voltage

limit.

VOFL = VVID – VSERR + VRERR = 1.470 V

RO = (VONL – VOFL)/IO = (1.53 V – 1.47 V)/56 A =

1.1 mΩ

•

Dynamic output drop resistance (ROD) based on

Output current step to no load with output voltage set

at upper output dynamic voltage limit.

VONLD = VVID + VDERR – VRERR = 1.550 V

Output voltage prior to load change (at IOUT = ΔIO).

VOL = VONL – (ΔIO × RO) = 1.504 V

ROD = (VONLD – VOL)/ΔIO = (1.55 V – 1.504 V)/24 A =

1.9 mΩ

•

Number of phases (n) = 3

•

Switching frequency per phase (fSW) = 330 kHz

SETTING THE CLOCK FREQUENCY

The ADP3186 uses a fixed-frequency control architecture. The

frequency is set by an external timing resistor (RT). The clock

frequency and the number of phases determine the switching

frequency per phase, which relates directly to switching losses,

and the sizes of the inductors, and the sizes of the input and

output capacitors. With n = 3 for three phases, a clock

frequency of 990 kHz sets the switching frequency (fSW) of each

phase to 330 kHz, which represents a practical trade-off

between the switching losses and the sizes of the output filter

components. Figure 6 shows that, to achieve an 990 kHz

oscillator frequency, the correct value for RT is 187 kΩ.

Alternatively, the value for RT can be calculated using

−

(1)

where 4.7 pF and 27 kΩ are internal IC component values. For

good initial accuracy and frequency stability, a 1% resistor is

recommended.

SOFT START AND CURRENT LIMIT LATCH-OFF

DELAY TIMES

Because the soft start and current limit latch-off delay functions

share the DELAY pin, these two parameters must be considered

together. The first step is to set CDLY for the soft start ramp. This

ramp is generated with a 20 μA internal current source. The

value of RDLY has a second-order impact on the soft start time,

because it sinks part of the current source to ground. However,

as long as RDLY is kept greater than 200 kΩ, this effect is minor.

The value for CDLY can be approximated using

VID

DLY

VID

DLY

⎟

⎠

⎞

⎜

⎝

⎛

−

(2)

where tSS is the desired soft start time. Assuming an RDLY of

390 kΩ and a desired soft start time of 3 ms, CDLY is 36 nF. The

closest standard value for CDLY is 39 nF. Once CDLY is chosen,

RDLY can be calculated for the current limit latch-off time using

DLY

DELAY

DLY

(3)

If the result for RDLY is less than 200 kΩ, a smaller soft start time

should be considered by recalculating the equation for CDLY, or a

longer latch-off time should be used. RDLY should never be less

than 200 kΩ. In this example, a delay time of 8 ms results in

RDLY equal to 402 kΩ. The closest standard 5% value is 390 kΩ.

INDUCTOR SELECTION

The choice of inductance for the inductor determines the ripple

current in the inductor. Less inductance leads to more ripple

current, which increases the output ripple voltage and conduction

losses in the MOSFETs, but allows using smaller inductors and,

for a specified peak-to-peak transient deviation, less total output

capacitance. Conversely, a higher inductance means lower

ripple current and reduced conduction losses, but requires

larger inductors and more output capacitance for the same

peak-to-peak transient deviation. In any multiphase converter, a

practical value for the peak-to-peak inductor ripple current is

less than 50% of the maximum dc current in the same inductor.

Equation 4 shows the relationships among the inductance,

oscillator frequency, and peak-to-peak ripple current in the

inductor.

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