ADP3186 datasheet(18/24 Pages) AD

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ADP3186

Rev. A | Page 18 of 24

With conduction losses being dominant, the following

expression shows the total power being dissipated in each

synchronous MOSFET in terms of the ripple current per phase

(IR) and average total output current (IO):

()

⎥

⎦

⎤

⎢

⎣

⎡

⎟⎟

⎠

⎞

⎜⎜

⎝

⎛

⎟⎟

⎠

⎞

⎜⎜

⎝

⎛

−

(15)

Knowing the maximum output current being designed for and

the maximum allowed power dissipation, one can find the

required RDS(ON) for the MOSFET. For D-PAK MOSFETs up to

an ambient temperature of 50°C, a safe limit for PSF is 1 W to

1.5 W at 120°C junction temperature. Thus, for this example

(56 A maximum), RDS(SF) < 4.8 mΩ. This RDS(SF) is also at a

junction temperature of about 120°C, so one needs to make sure

to account for this when making this selection. This example

uses one low-side MOSFET at 4.8 mΩ at 120°C.

Another important factor for the synchronous MOSFET is the

input capacitance and feedback capacitance. The ratio of the

feedback to input needs to be small (less than 10% is recom-

mended) to prevent accidental turn-on of the synchronous

MOSFETs when the switch node goes high.

Also, the time to switch the synchronous MOSFETs off should

not exceed the nonoverlap dead time of the MOSFET driver

(40 ns typical for the ADP3110A). The output impedance of the

driver is approximately 2 Ω, and the typical MOSFET input gate

resistances are about 1 Ω to 2 Ω, so a total gate capacitance of

less than 6000 pF should be adhered to. Because there is one

MOSFET, the input capacitance for the synchronous MOSFET

should be limited to 6000 pF.

The high-side (main) MOSFET must be able to handle two

main power dissipation components: conduction and switching

losses. The switching loss is related to the amount of time it

takes for the main MOSFET to turn on and off, and to the

current and voltage that are being switched. Basing the switching

speed on the rise and fall time of the gate driver impedance and

MOSFET input capacitance, the following expression provides

an approximate value for the switching loss per main MOSFET,

where nMF is the total number of main MOSFETs:

()

ISS

= 2

(16)

where:

RG is the total gate resistance (2 Ω for the ADP3110A and about

1 Ω for typical high speed switching MOSFETs, making

RG = 3 Ω).

CISS is the input capacitance of the main MOSFET.

It is interesting to note that adding more main MOSFETs (nMF)

does not help the switching loss per MOSFET, because the

additional gate capacitance slows switching. The best way to

reduce switching loss is to use lower gate capacitance devices.

The conduction loss of the main MOSFET is given by the

following equation, where RDS(MF) is the on resistance of the

MOSFET:

()

⎥

⎦

⎤

⎢

⎣

⎡

⎟⎟

⎠

⎞

⎜⎜

⎝

⎛ ×

⎟⎟

⎠

⎞

⎜⎜

⎝

⎛

(17)

Typically, for main MOSFETs, the highest speed (low CISS)

device is preferred, but these usually have higher on resistance.

Select a device that meets the total power dissipation (about

1.5 W for a single D-PAK) when combining the switching and

conduction losses.

For this example, an NTD60N02 was selected as the main

MOSFET (three total; nMF = 3), with a CISS = 948 pF (max), and

RDS(MF) = 11.2 mΩ (max at TJ = 120°C), and an NTD110N02 was

selected as the synchronous MOSFET (three total; nSF = 3), with

CISS = 2710 pF (max), and RDS(SF) = 4.8 mΩ (max at TJ = 120°C).

The synchronous MOSFET CISS is less than 6000 pF, satisfying

that requirement. Solving for the power dissipation per MOSFET

at IO = 56 A and IR = 6.6 A yields 913 mW for each synchronous

MOSFET and 1.48 W for each main MOSFET.

One last issue to consider is the power dissipation in the driver

for each phase. This is best described in terms of the QG for the

MOSFETs and is given by the following equation, where QGMF is

the total gate charge for each main MOSFET and QGSF is the

total gate charge for each synchronous MOSFET:

()

GSF

GMF

DRV

⎥

⎦

⎤

⎢

⎣

⎡

(18)

Also shown is the standby dissipation factor (ICC × VCC) for the

driver. For the ADP3110A, the maximum dissipation should be

less than 400 mW. In this example, with ICC = 7 mA, QGMF =

16 nC, and QGSF = 48 nC, one finds 211 mW in each driver,

which is below the 400 mW dissipation limit. See the

ADP3110A data sheet for more details.

RAMP RESISTOR SELECTION

The ramp resistor (RR) is used for setting the size of the internal

PWM ramp. The value of this resistor is chosen to provide the

best combination of thermal balance, stability, and transient

response. The following expression is used for determining the

optimum value:

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