TSB41AB3IPFP datasheet(25/52 Pages) TI

25 / 52 page

TSB41AB3

IEEE 1394a2000 THREEPORT CABLE TRANSCEIVER/ARBITER

SLLS418I − JUNE 2000 − REVISED DECEMBER 2004

POST OFFICE BOX 655303

• DALLAS, TEXAS 75265

APPLICATION INFORMATION

EMI guidelines

For electromagnetic interference (EMI) guidelines and recommendations, send a request via email to:

1394-EMI@list.ti.com

designing with PowerPAD

The TSB41AB3 is housed in a high performance, thermally enhanced, 80-pin PFP PowerPAD package. Use

of the PowerPAD package does not require any special considerations except to note that the PowerPAD, which

is an exposed die pad on the bottom of the device, is a metallic thermal and electrical conductor. Therefore, if

not implementing PowerPAD PCB features, the use of solder masks (or other assembly techniques) may be

required to prevent any inadvertent shorting by the exposed PowerPAD of connection etches or vias under the

package. The recommended option, however, is to not run any etches or signal vias under the device, but to

have only a grounded thermal land as explained below. Although the actual size of the exposed die pad may

vary, the minimum size required for the keepout area for the 80-pin PFP PowerPAD package is 10 mm

× 10 mm.

It is recommended that there be a thermal land, which is an area of solder-tinned-copper, underneath the

PowerPAD package. The thermal land varies in size, depending on the PowerPAD package being used, the

PCB construction, and the amount of heat that needs to be removed. In addition, the thermal land may or may

not contain numerous thermal vias depending on PCB construction.

Other requirements for thermal lands and thermal vias are detailed in the TI application note PowerPAD

Thermally Enhanced Package Application Report, TI literature number SLMA002, available via the TI Web

pages beginning at URL: http://www.ti.com.

Figure 10. Example of a Thermal Land for the TSB41AB3 PHY

The thermal land for the TSB41AB3 must be grounded to the low impedance ground plane of the device. This

improves not only thermal performance but also the electrical grounding of the device. It is also recommended

that the device ground terminal landing pads be connected directly to the grounded thermal land. The land size

is as large as possible without shorting device signal terminals. The thermal land may be soldered to the

exposed PowerPAD using standard reflow soldering techniques.

While the thermal land may be electrically floated and configured to remove heat to an external heat sink, it is

recommended that the thermal land be connected to the low impedance ground plane for the device. More

information may be obtained from the TI application note PHY Layout, TI literature number SLLA020.

using the TSB41AB3 with a non-1394a-2000 link layer

The TSB41AB3 implements the PHY-LLC interface specified in the 1394a-2000 Supplement. This interface is

based upon the interface described in informative Annex J of IEEE Std 1394-1995, which is the interface used

in older TI PHY devices. The PHY-LLC interface specified in 1394a-2000 is completely compatible with the older

Annex J interface.

TSB41AB3IPFP Datasheet(PDF) 25 Page - Texas Instruments