PCA9420BS datasheet(15/85 Pages) NXP

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NXP Semiconductors

PCA9420

Power management IC for low-power microcontroller applications

• All settings for LDO1/LDO2/SW1/SW2 set to Mode 0 settings

2. nEN_CHG_IN_WATCHDOG=1: when the watchdog timer expires, the following operations are expected.

• The SYSRSTn signal asserted (high to low)

• Charging is suspended

• All settings for LDO1/LDO2/SW1/SW2 set to Mode 0 settings

The following events reset the watchdog timer:

1. When WD_TIMER_CLR bit is set to 3b’001 at 0Dh register

2. When the device changes the mode settings

8.12 Regulators

There are four regulators on PCA9420, which include two buck regulators and two LDOs. Table 5 shows the

outline for each regulator:

Regulator name

Output regulation voltage range

Adjustable resolution

Max output current

SW1 (Core Buck)

0.5 V to 1.5 V and a fixed 1.8 V

25 mV/step

Up to 250 mA

SW2 (System Buck)

1.5 V to 2.1 V or 2.7 V to 3.3 V

25 mV/step

Up to 500 mA

LDO1 (Always-on LDO) 1.7 V to 1.9 V

25 mV/step

Up to 1 mA

LDO2 (System LDO)

1.5 V to 2.1 V or 2.7 V to 3.3 V

25 mV/step

Up to 250 mA

Table 5. Regulator summary

For each rail, its output target voltage can be set independently in mode setting 0, 1, 2 or 3. User can also

choose to switch among any of the mode settings.

8.12.1 Enable/disable and active discharge

Enable/disable: Each rail can be enabled/disabled via I2C register setting independently in each mode setting.

Active discharge: Additionally, there is an active discharge resistor on each rail, and the user can choose to

enable/disable such feature through I2C register setting, so that when the output rail is disabled, it can quickly

discharge the output voltage to ground. In addition, the active discharge is also enabled during voltage step

down. This can be disabled by MTP bit.

If the active discharge bleeding resistor is enabled AND there is a change of the Buck regulators' output voltage

to a lower value (i.e. from 0.9 V to 0.75 V) there could be a small voltage peak of 5 % higher than the initial

voltage (for 10 µs) during the transition. If this behavior is not desired, the bleeding resistor can be disabled

(nEN_SW1_BLEED = 1 or nEN_SW2_BLEED = 1) but with the effect of a potentially longer transition to the

new voltage of the buck regulator output

8.12.2 Power-good indication

There is an output voltage comparator for each rail, comparing the actual output voltage against 90 % and

110 % of its target value; when the actual voltage is between 90 % and 110 % of its target value, the read-

only related bits in I2C register, Regulator Status_1 (address: 20h) are updated accordingly to report the output

voltage status (Power-good Indication). These comparators can be enabled/disabled by setting I2C register

bit, PG_EN. A corresponding interrupt is triggered if unmasked. During steady state, only 90 % threshold is

monitored.

The power-good indication is shown as “not good”, and refreshes upon the completion of any of the following

events:

1. During the power-up sequence stage

PCA9420

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 4.2 — 26 July 2023

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