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PCA9420BS Datasheet(PDF) 35 Page - NXP Semiconductors |
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PCA9420BS Datasheet(HTML) 35 Page - NXP Semiconductors |
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35 / 85 page ![]() NXP Semiconductors PCA9420 Power management IC for low-power microcontroller applications Bit Symbol Default value Type Function MODESEL1 pins. Refer to EN_MODE_SEL_BY_PIN description for more details. With EN_MODE_SEL_BY_PIN=0, the mode selection is determined by the following: [MODE1_I2C: MODE0_I2C] = 00, mode 0 setting [MODE1_I2C: MODE0_I2C] = 01, mode 1 setting [MODE1_I2C: MODE0_I2C] = 10, mode 2 setting [MODE1_I2C: MODE0_I2C] = 11, mode 3 setting 2 SW_RST 0 W/C Chip software reset bit. If user writes a “1” to this bit, it resets all other I2C register bit to its default setting and cycles the regulator outputs, and meanwhile, this bit clears and resets back to “0” as well. 1 0 ON_GLT_LONG [1:0] 01 R/W Program a long glitch timer on ON key 00: 4 s 01: 8 s 10: 12 s 11: 16 s Note: 2-bit MTP should be reserved to change the default setting Table 20. TOP_CNTL3 register bit description...continued 9.5.13 Top level control_4 (TOP_CTL4, address 0Dh) This register contains various configuration bits for top level related functions, part 4. This is a WRITE ONLY register. Bit Symbol Default value Type Function 7 6 5 4 3 RSVD 00000 W Reserved bit 2 1 0 WD_TIMER_CLR [2:0] 000 W Watchdog Timer Reset. 001: When written 001 to WD_TIMER_CLR [2:0], the watchdog timer is reset. All other values: when written to WD_TIMER_CLR [2:0], watchdog timer remains unaffected. Table 21. TOP_CNTL4 register bit description 9.5.14 Battery charger control_0 (CHG_CTL0, address 10h) This register stores the linear battery charge related control registers, part 0. This is a READ AND WRITE register. Bit Symbol Default value Type Function 7 6 5 CHG_LOCK [4:0] 00000 R/W Critical charger related setting lock. CHG_LOCK [4:0] = 10101, these registers which are labeled as “locked by CHG_LOCK” can be accessed to perform I2C “write” command. Table 22. CHG_CNTL0 register bit description PCA9420 All information provided in this document is subject to legal disclaimers. © 2023 NXP B.V. All rights reserved. Product data sheet Rev. 4.2 — 26 July 2023 35 / 85 |
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