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PCA9420BS Datasheet(PDF) 33 Page - NXP Semiconductors |
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PCA9420BS Datasheet(HTML) 33 Page - NXP Semiconductors |
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33 / 85 page ![]() NXP Semiconductors PCA9420 Power management IC for low-power microcontroller applications Bit Symbol Default value Type Function • SYSRSTn signal asserts (high to low) • Charging is continued • LDO1/LDO2/SW1/SW2 enters the mode 0 setting 1: When the programmed watchdog timer expires, the following operations take place. • SYSRSTn signal asserts (high to low) • Charging is disabled • LDO1/LDO2/SW1/SW2 enters the mode 0 setting 1 RSVD 0 R/W Reserved bit 0 PGood_EN 1 R/W LDO1, LDO2, SW1, SW2 Output Voltage Status Indication 0: Output voltage power-good comparators are disabled. This also sets “VOUTSW1 _OK”, “VOUTSW2 _OK”, “VOUTLDO1_OK” and “VOUTLDO2 _OK” bits to 0 1: Output voltage power-good comparators are enabled Table 17. TOP_CNTL0 register bit description...continued [1] A valid VIN does not generate the initial power-up sequence if all power rails have been turned off by setting PWR_DN_EN to 1. The use of PWR_DN_EN bit is prohibited to be used in any application that requires power-up sequence by both VIN and ON key. The use of SHIP_EN_x (x can be 0, 1, 2 &3) is recommended for the application. 9.5.10 Top level control_1 (TOP_CTL1, address 0Ah) This register contains various configuration bits for top level related functions, part 1. This is a READ AND WRITE register. Bit Symbol Default value Type Function 7 6 ASYS_PREWARNING [1:0] 10 R/W ASYS Program a pre-warning voltage threshold on ASYS 00: 3.3 V 01: 3.4 V 10: 3.5 V 11: 3.6 V 5 4 ASYS_INPUT_SEL [1:0] 00 R/W ASYS input source selection 00: ASYS is powered by either VBAT or VIN (VIN has higher priority over VBAT if both are presented but only when VIN>VBAT) 01: ASYS is powered by VBAT only 10: ASYS is powered by VIN only 11: ASYS is disconnected to either VBAT or VIN (for internal testing purpose only) 3 RSVD 1 R/W Reserved bit 2 VIN_OVP_SEL 0 R/W VIN over-voltage protection threshold (rising) selection 0: 5.50 V 1: 6.0 V Note: The current default value for VIN_OVP_SEL is set at 5.5 V, but it should be MTP programmable 1 0 VIN_UVLO_SEL [1:0] 01 R/W Program an under-voltage lockout threshold (falling) on VIN 00: 2.9 V 01: 3.1 V Table 18. TOP_CNTL1 register bit description PCA9420 All information provided in this document is subject to legal disclaimers. © 2023 NXP B.V. All rights reserved. Product data sheet Rev. 4.2 — 26 July 2023 33 / 85 |
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