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PCA9420BS Datasheet(PDF) 84 Page - NXP Semiconductors

Part # PCA9420BS
Description  Power management IC for low-power microcontroller applications
PDF  85 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

PCA9420BS Datasheet(HTML) 84 Page - NXP Semiconductors

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NXP Semiconductors
PCA9420
Power management IC for low-power microcontroller applications
Contents
1
General description ............................................ 1
2
Features and benefits .........................................1
3
Applications .........................................................2
4
Ordering information .......................................... 2
4.1
Ordering options ................................................ 2
5
Simplified block diagram ................................... 3
6
Pinning information ............................................ 4
6.1
Pinning ...............................................................4
6.2
Pin description ................................................... 5
7
System configuration diagram .......................... 7
8
Functional description ........................................9
8.1
Power control state diagram ..............................9
8.2
VIN ...................................................................10
8.2.1
VIN_ILIM and VSYS/VBAT interaction
cases ................................................................10
8.2.1.1
Case 0: Battery charger in attach detection
sequence & VIN current < VIN_ILIM ............... 10
8.2.1.2
Case 1: Battery charger active & VIN
current < VIN_LIM ........................................... 10
8.2.1.3
Case 2: Battery charger active & VIN
current increases above VIN_LIM (ISYS <
VIN_ILIM) .........................................................10
8.2.1.4
Case 3: Battery charger active & VIN
current decreasing below VIN_LIM (ISYS <
VIN_ILIM) .........................................................10
8.2.1.5
Case 4: VIN current increasing above
VIN_LIM and Battery supplemental mode
activation (ISYS > VIN_ILIM) ...........................10
8.3
ASYS ............................................................... 11
8.4
VBAT_BKUP (back-up battery input) ............... 11
8.5
ON ....................................................................11
8.6
TS .................................................................... 12
8.7
Mode setting .................................................... 12
8.8
Mode selection by external pins
(MODESEL0, MODESEL1) ............................. 13
8.9
SYSRSTn .........................................................13
8.10
SHIP mode ...................................................... 14
8.11
Watchdog timer ................................................14
8.12
Regulators ........................................................15
8.12.1
Enable/disable and active discharge ............... 15
8.12.2
Power-good indication ..................................... 15
8.12.3
Power-up/down sequence and on-the-fly
voltage change ................................................ 16
8.12.4
BUCK1 (SW1, core buck regulator) .................17
8.12.5
BUCK2 (SW2, system buck regulator) .............17
8.12.6
LDO1 (always-on LDO) ................................... 18
8.12.7
LDO2 (system LDO) ........................................18
8.13
Linear battery charger ..................................... 18
8.13.1
Battery charging management .........................19
8.13.2
Battery temperature sensing and JEITA-
compliant charging profile ................................22
8.13.3
Battery attach detection ...................................22
8.13.4
Low-battery/dead-battery (pre-qualification)
charging ........................................................... 22
8.13.5
Constant current charging/constant voltage
charging (fast charging) and termination ......... 23
8.13.6
Charger safety timers ...................................... 23
8.13.7
Recharging .......................................................23
8.13.8
Starting a new charge cycle ............................ 23
8.14
Hardware and software reset .......................... 23
8.15
Device level protection features .......................23
9
I2C-bus interface and register ......................... 24
9.1
I2C target address ...........................................24
9.2
General call and device ID addresses ............. 24
9.3
Register type ................................................... 24
9.4
Register map ................................................... 25
9.5
Register description .........................................26
9.5.1
Device information (DEV_INFO, address
00h) ..................................................................26
9.5.2
Top level interrupt status (TOP_INT,
address 01h) ....................................................27
9.5.3
Sub level interrupt_0 (SUB_INT0, address
02h) ..................................................................28
9.5.4
Sub level interrupt_0 mask (Sub_INT0_
Mask, address 03h) .........................................28
9.5.5
Sub level interrupt_1 (Sub_INT1, address
04h) ..................................................................29
9.5.6
Sub level interrupt_1 mask (Sub_INT1_
Mask, address 05h) .........................................30
9.5.7
Sub level interrupt_2 (Sub_INT2, address
06h) ..................................................................31
9.5.8
Sub level interrupt_2 mask (Sub_INT2_
Mask, address 07h) .........................................31
9.5.9
Top level control_0 (TOP_CTL0, address
09h) ..................................................................32
9.5.10
Top level control_1 (TOP_CTL1, address
0Ah) ................................................................. 33
9.5.11
Top level control_2 (TOP_CTL2, address
0Bh) ................................................................. 34
9.5.12
Top level control_3 (TOP_CTL3, address
0Ch) ................................................................. 34
9.5.13
Top level control_4 (TOP_CTL4, address
0Dh) ................................................................. 35
9.5.14
Battery charger control_0 (CHG_CTL0,
address 10h) ....................................................35
9.5.15
Battery charger control_1 (CHG_CTL1,
address 11h) ....................................................36
9.5.16
Battery charger control_2 (CHG_CTL2,
address 12h) ....................................................37
9.5.17
Battery charger control_3 (CHG_CTL3,
address 13h) ....................................................38
9.5.18
Battery charger control_4 (CHG_CTL4,
address 14h) ....................................................38
9.5.19
Battery charger control_5 (CHG_CTL5,
address 15h) ....................................................40
9.5.20
Battery charger control_6 (CHG_CTL6,
address 16h) ....................................................40
9.5.21
Battery charger control_7 (CHG_CTL7,
address 17h) ....................................................41
9.5.22
Battery charger status_0 (CHG_STATUS_
0, address 18h) ............................................... 42
PCA9420
All information provided in this document is subject to legal disclaimers.
© 2023 NXP B.V. All rights reserved.
Product data sheet
Rev. 4.2 — 26 July 2023
84 / 85



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