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VSC8541-02 Datasheet(PDF) 62 Page - Microchip Technology |
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VSC8541-02 Datasheet(HTML) 62 Page - Microchip Technology |
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62 / 101 page ![]() Registers VMDS-10513 VSC8541-02 Datasheet Revision 4.1 53 12 SOFEnable R/W Sticky bit. 0: SOF indication disabled. 1: SOF indication enabled. 0 11:8 Reserved RO Reserved. 7 RGMII/GMII RXD bit reversal R/W Sticky bit. When set to 1, makes the following reversed mapping internally: RGMII Mode RXD3 maps to RXD0 RXD2 maps to RXD1 RXD1 maps to RXD2 RXD0 maps to RXD3 GMII/MII Mode RXD7 maps to RXD0 RXD6 maps to RXD1 RXD5 maps to RXD2 RXD4 maps to RXD3 RXD3 maps to RXD4 RXD2 maps to RXD5 RXD1 maps to RXD6 RXD0 maps to RXD7 0 6:4 RX_CLK delay R/W Sticky bit. 000: 0.2 ns delay. 001: 0.8 ns delay. 010: 1.1 ns delay. 011: 1.7 ns delay. 100: 2.0 ns delay. 101: 2.3 ns delay. 110: 2.6 ns delay. 111: 3.4 ns delay. 000 3 RGMII/GMII TXD bit reversal R/W Sticky bit. When set to 1, makes the following reversed mapping internally: RGMII Mode TXD3 maps to TXD0 TXD2 maps to TXD1 TXD1 maps to TXD2 TXD0 maps to TXD3 GMII/MII Mode TXD7 maps to TXD0 TXD6 maps to TXD1 TXD5 maps to TXD2 TXD4 maps to TXD3 TXD3 maps to TXD4 TXD2 maps to TXD5 TXD1 maps to TXD6 TXD0 maps to TXD7 0 Table 60 • RGMII Control, Address 20E2 (0x14) (continued) Bit Name Access Description Default |
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