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VSC8541-02 Datasheet(PDF) 63 Page - Microchip Technology |
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VSC8541-02 Datasheet(HTML) 63 Page - Microchip Technology |
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63 / 101 page ![]() Registers VMDS-10513 VSC8541-02 Datasheet Revision 4.1 54 4.4.4 Wake-on-LAN MAC Address [15:0] The following table shows the register settings for the Wake-on-LAN MAC address at 21E2. 4.4.5 Wake-on-LAN MAC Address [31:16] The following table shows the register settings for the Wake-on-LAN MAC address at 22E2. 4.4.6 Wake-on-LAN MAC Address [47:32] The following table shows the register settings for the Wake-on-LAN MAC address at 23E2. 4.4.7 Secure-On Password [15:0] The following table shows the register settings for the Secure-On password used for WoL at 24E2. 2:0 TX_CLK delay R/W Sticky bit. 000: 0.2 ns delay. 001: 0.8 ns delay. 010: 1.1 ns delay. 011: 1.7 ns delay. 100: 2.0 ns delay. 101: 2.3 ns delay. 110: 2.6 ns delay. 111: 3.4 ns delay. 000 Table 61 • Wake-on-LAN MAC Address, 21E2 (0x15) Bit Name Access Description Default 15:0 WoL MAC address [15:0] R/W Sticky bit. WoL MAC address lower two bytes. 0x0000 Table 62 • Wake-on-LAN MAC Address, 22E2 (0x16) Bit Name Access Description Default 15:0 WoL MAC address [31:16] R/W Sticky bit. WoL MAC address middle two bytes. 0x0000 Table 63 • Wake-on-LAN MAC Address, 23E2 (0x17) Bit Name Access Description Default 15:0 WoL MAC address [47:32] R/W Sticky bit. WoL MAC address upper two bytes. 0x0000 Table 64 • Secure-On Password, 24E2 (0x18) Bit Name Access Description Default 15:0 Secure-On password [15:0] R/W Sticky bit. Secure-On password for WoL lower two bytes. 0x0000 Table 60 • RGMII Control, Address 20E2 (0x14) (continued) Bit Name Access Description Default |
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