TSS461C datasheet(20/57 Pages) ATMEL

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TSS461C

4193G–AUTO–12/04

Status bits give permanent information on the diagnosis performed, whatever the pro-

grammed operating mode. This is encoded over three bits: Sa, Sb and Sc. Sa and Sb

bits indicate the four possible states of the VAN bus.

Table 3. Status Bits Sa and Sb

Notes:

1. Sc bit sets to 1 as soon as one of the three inputs (RXD2, RXD1, RXD0) differs from

the others in the input comparison analysis performed by the diagnosis system, S2 is

set.

2. The only way to reset this status bit is through the RI signal or a general reset.

Internal Operations

Digital Filtering

If several spurious pulses occur during one bit, the diagnosis for defective conductor

may occur. To avoid such errors, digital filters are implemented.

Filtering operation is based on sampling of the comparator output signals. A transition is

taken into account only if it is observed over five samples (1/16th of timeslot).

Transition Analyses

These analyses are continuously done on the effective edges on comparators after digi-

tal filtering.

•

Asynchronous diagnosis:

The asynchronous diagnosis is done by comparing the number of edges on DATA

and DATA.

If four edges are detected on one input and no edges on the other during the same

period, the second input is considered faulty and the diagnosis mode will change to

one of the degraded modes.

•

Synchronous diagnosis:

The synchronous diagnosis counts the number of edges on the data input

connected to the reception logic during one SDC period.

Communication

Mode

Nominal

Fault

No fault on VAN bus

Status

Differential communication DATA and DATA

Mode

Degraded on DATA

Fault

Fault on DATA

Status

Communication on DATA

Mode

Degraded on DATA

Fault

Fault on DATA

Status

Communication on DATA

Mode

Major error

Fault

Fault on DATA and DATA

Status

No communication on DATA and DATA (attempt to

communicate alternatively on DATA then DATA every

SDC period.

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