TSS461C datasheet(34/57 Pages) ATMEL

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TSS461C

4193G–AUTO–12/04

RSTR: Reset Interrupt Reset

One: Status flag reset

Zero: Status flag unchanged

TER: Transmit Error Status Flag

Reset

One: Status flag reset

Zero: Status flag unchanged

TOKR: Transmit OK Status Flag

Reset

One: Status flag reset

Zero: Status flag unchanged

RER: Receive Error Status Flag

Reset

One: Status flag reset

Zero: Status flag unchanged

ROKR: Receive “with RAK” OK

Status Flag Reset

One: Status flag reset

Zero: Status flag unchanged

RNOKR: Receive “with no RAK”

OK Status Flag Reset

One: Status flag reset

Zero: Status flag unchanged

Figure 20. Update of the Status Register

Channel Registers

There is a total of 14 channel register sets, each occupying 8 bytes for addressing sim-

plicity, integrated into the circuit. Each set contains two 2 x 8-bit registers for the

indentifier tag, indentifier mask and command fields plus two 1 x 8-bit registers for DMA

pointers and message status.

The base_address of each set is: (0x10 + [0x08 * channel_number]).

When the TSS461C is reset either via the external reset pin or the general reset com-

mand, the channel registers are not affected. For example, on power-up of the circuit, all

the channel registers start with random values.

Due to this fact, the user should take care to initialize all the channel registers before

exiting from idle mode. The easiest way to disable a channel register is to set the

received and transmitted bits to 1 in the Message Length & Status Register.

Line Status Register (0x04)

4 TS

1 to 2 TS

6 TS

SOF

ID+COM+DATA+CRC

BUS

INT

Write “IT Status Register”

Write “Last Error Register”

Write “Last Message Register”

Write “Message Length & Status Register”

Write “Message Status”

TSS461C Datasheet(PDF) 34 Page - ATMEL Corporation

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