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PIC16CR74E/SP Datasheet(PDF) 33 Page - Microchip Technology |
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PIC16CR74E/SP Datasheet(HTML) 33 Page - Microchip Technology |
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33 / 172 page ![]() © 2007 Microchip Technology Inc. DS21993C-page 31 PIC16CR7X 4.0 I/O PORTS Some pins for these I/O ports are multiplexed with an alternate function for the peripheral features on the device. In general, when a peripheral is enabled, that pin may not be used as a general purpose I/O pin. Additional information on I/O ports may be found in the “PIC® Mid-Range MCU Family Reference Manual” (DS33023). 4.1 PORTA and the TRISA Register PORTA is a 6-bit wide, bidirectional port. The corre- sponding data direction register is TRISA. Setting a TRISA bit (= 1) will make the corresponding PORTA pin an input (i.e., put the corresponding output driver in a High-Impendance mode). Clearing a TRISA bit (= 0) will make the corresponding PORTA pin an output (i.e., put the contents of the output latch on the selected pin). Reading the PORTA register reads the status of the pins, whereas writing to it will write to the PORT latch. All write operations are read-modify-write operations. Therefore, a write to a port implies that the port pins are read, the value is modified and then written to the PORT data latch. Pin RA4 is multiplexed with the Timer0 module clock input to become the RA4/T0CKI pin. The RA4/T0CKI pin is a Schmitt Trigger input and an open drain output. All other PORTA pins have TTL input levels and full CMOS output drivers. Other PORTA pins are multiplexed with analog inputs and analog VREF input. The operation of each pin is selected by clearing/setting the control bits in the ADCON1 register (A/D Control Register1). The TRISA register controls the direction of the RA pins, even when they are being used as analog inputs. The user must ensure the bits in the TRISA register are maintained set, when using them as analog inputs. EXAMPLE 4-1: INITIALIZING PORTA FIGURE 4-1: BLOCK DIAGRAM OF RA3:RA0 AND RA5 PINS FIGURE 4-2: BLOCK DIAGRAM OF RA4/T0CKI PIN Note: On a Power-on Reset, these pins are configured as analog inputs and read as ‘0’. BCF STATUS, RP0 ; BCF STATUS, RP1 ; Bank0 CLRF PORTA ; Initialize PORTA by ; clearing output ; data latches BSF STATUS, RP0 ; Select Bank 1 MOVLW 0x06 ; Configure all pins MOVWF ADCON1 ; as digital inputs MOVLW 0xCF ; Value used to ; initialize data ; direction MOVWF TRISA ; Set RA<3:0> as inputs ; RA<5:4> as outputs ; TRISA<7:6>are always ; read as ‘0’. Data Bus P N WR Port WR TRIS RD TRIS RD PORT VSS VDD I/O pin(1) Note 1: I/O pins have protection diodes to VDD and VSS. Analog Input Mode TTL Input Buffer To A/D Converter EN QD EN Data Latch TRIS Latch Q D Q CK Q D Q CK Data Bus WR PORT WR TRIS RD PORT Data Latch TRIS Latch RD TRIS Schmitt Trigger Input Buffer N VSS I/O pin(1) TMR0 Clock Input Q D Q CK Q D Q CK EN QD EN Note 1: I/O pin has protection diodes to VSS only. |
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