PIC16CR74ESLASHSP datasheet(66/172 Pages) MICROCHIP

66 / 172 page

PIC16CR7X

DS21993C-page 64

FIGURE 9-4:

SPI MODE TIMING (SLAVE MODE WITH CKE = 1)

TABLE 9-1:

REGISTERS ASSOCIATED WITH SPI OPERATION

Address

Name

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Value on

POR,

BOR

Value on

all other

Resets

0Bh,8Bh.

10Bh,18Bh

INTCON

GIE

PEIE

TMR0IE INTE

RBIE

TMR0IF

INTF

RBIF

0000 000x

0000 000u

0Ch

PIR1

PSPIF(1)

ADIF

RCIF

TXIF

SSPIF

CCP1IF TMR2IF

TMR1IF

0000 0000

8Ch

PIE1

PSPIE(1)

ADIE

RCIE

TXIE

SSPIE

CCP1IE TMR2IE TMR1IE 0000 0000 0000 0000

87h

TRISC

PORTC Data Direction Register

1111 1111

13h

SSPBUF

Synchronous Serial Port Receive Buffer/Transmit Register

xxxx xxxx

uuuu uuuu

14h

SSPCON

WCOL

SSPOV

SSPEN

CKP

SSPM3

SSPM2

SSPM1

SSPM0

0000 0000

85h

TRISA

—

PORTA Data Direction Register

--11 1111

94h

SSPSTAT

SMP

CKE

D/A

R/W

0000 0000

Legend:

= unknown, u = unchanged, – = unimplemented, read as ‘0’. Shaded cells are not used by the SSP in SPI mode.

Note

Bits PSPIE and PSPIF are reserved on the PIC16CR73/76; always maintain these bits clear.

SCK (CKP = 0)

SDI (SMP = 0)

SSPIF

bit 7

bit 6

bit 5

bit 4

bit 3

bit 2

bit 1

bit 0

SCK (CKP = 1)

SDO

bit 7

bit 0

PIC16CR74E/SP Datasheet(PDF) 66 Page - Microchip Technology

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