PIC16CR74ESLASHSP datasheet(52/172 Pages) MICROCHIP

52 / 172 page

PIC16CR7X

DS21993C-page 50

6.5

Timer1 Oscillator

A crystal oscillator circuit is built-in between pins T1OSI

(input) and T1OSO (amplifier output). It is enabled by

setting control bit T1OSCEN (T1CON<3>). The oscilla-

tor is a low-power oscillator rated up to 200 kHz. It will

continue to run during Sleep. It is primarily intended for

use with a 32 kHz crystal. Table 6-1 shows the capaci-

tor selection for the Timer1 oscillator.

The Timer1 oscillator is identical to the LP oscillator.

The user must provide a software time delay to ensure

proper oscillator start-up.

6.6

Resetting Timer1 using a CCP

Trigger Output

If the CCP1 or CCP2 module is configured in Compare

mode

generate

“special

event

trigger”

(CCP1M3:CCP1M0 = 1011), this signal will reset

Timer1.

Timer1 must be configured for either Timer or Synchro-

nized Counter mode, to take advantage of this feature.

If Timer1 is running in Asynchronous Counter mode,

this Reset operation may not work.

In the event that a write to Timer1 coincides with a

special event trigger from CCP1 or CCP2, the write will

take precedence.

In this mode of operation, the CCPRxH:CCPRxL regis-

ter pair effectively becomes the period register for

Timer1.

6.7

Resetting of Timer1 Register Pair

(TMR1H, TMR1L)

TMR1H and TMR1L registers are not reset to 00h on a

POR, or any other Reset, except by the CCP1 and

CCP2 special event triggers.

TABLE 6-1:

CAPACITOR SELECTION FOR

THE TIMER1 OSCILLATOR

T1CON register is reset to 00h on a Power-on Reset or

a Brown-out Reset, which shuts off the timer and

leaves a 1:1 prescale. In all other Resets, the register

is unaffected.

6.8

Timer1 Prescaler

The prescaler counter is cleared on writes to the

TMR1H or TMR1L registers.

TABLE 6-2:

REGISTERS ASSOCIATED WITH TIMER1 AS A TIMER/COUNTER

Note:

The special event triggers from the CCP1

and CCP2 modules will not set interrupt

flag bit TMR1IF (PIR1<0>).

Osc Type

Frequency

Capacitors Used:

OSC1

OSC2

32 kHz

47 pF

100 kHz

33 pF

200 kHz

15 pF

Capacitor values are for design guidance only.

These capacitors were tested with the crystals listed

below for basic start-up and operation. These values

were not optimized.

Different capacitor values may be required to produce

acceptable oscillator operation. The user should test

the performance of the oscillator over the expected

VDD and temperature range for the application.

See the notes (below) table for additional information.

Commonly Used Crystals:

32.768 kHz

Epson C-001R32.768K-A

100 kHz

Epson C-2 100.00 KC-P

200 kHz

STD XTL 200.000 kHz

Note 1:

Higher capacitance increases the stability

of the oscillator, but also increases the

start-up time.

Since each resonator/crystal has its own

characteristics, the user should consult

the resonator/crystal manufacturer for

appropriate values of external compo-

nents.

Address

Name

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Value on

POR,

BOR

Value on

all other

Resets

0Bh,8Bh,

10Bh,18Bh

INTCON

GIE

PEIE

TMR0IE

INTE

RBIE

TMR0IF

INTF

RBIF

0000 000x

0000 000u

0Ch

PIR1

PSPIF(1)

ADIF

RCIF

TXIF

SSPIF

CCP1IF

TMR2IF

TMR1IF

0000 0000

8Ch

PIE1

PSPIE(1)

ADIE

RCIE

TXIE

SSPIE

CCP1IE

TMR2IE

TMR1IE

0000 0000

0Eh

TMR1L

Holding Register for the Least Significant Byte of the 16-bit TMR1 Register

xxxx xxxx

uuuu uuuu

0Fh

TMR1H

Holding Register for the Most Significant Byte of the 16-bit TMR1 Register

xxxx xxxx

uuuu uuuu

10h

T1CON

—

T1CKPS1

T1CKPS0

T1OSCEN

T1SYNC

TMR1CS

TMR1ON

--00 0000

--uu uuuu

Legend:

= unknown, u = unchanged, – = unimplemented, read as ‘0’. Shaded cells are not used by the Timer1 module.

Note

Bits PSPIE and PSPIF are reserved on the PIC16CR73/76; always maintain these bits clear.

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