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PIC16CR74E/SP Datasheet(PDF) 14 Page - Microchip Technology

Part # PIC16CR74E/SP
Description  28/40-Pin, 8-Bit CMOS ROM Microcontrollers
PDF  172 Pages
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Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

PIC16CR74E/SP Datasheet(HTML) 14 Page - Microchip Technology

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PIC16CR7X
DS21993C-page 12
© 2007 Microchip Technology Inc.
PORTD is a bidirectional I/O port or parallel slave port
when interfacing to a microprocessor bus.
RD0/PSP0
RD0
PSP0
19
21
38
I/O
I/O
ST/TTL(3)
Digital I/O.
Parallel Slave Port data.
RD1/PSP1
RD1
PSP1
20
22
39
I
I/O
I/O
ST/TTL(3)
Digital I/O.
Parallel Slave Port data.
RD2/PSP2
RD2
PSP2
21
23
40
I
I/O
I/O
ST/TTL(3)
Digital I/O.
Parallel Slave Port data.
RD3/PSP3
RD3
PSP3
22
24
41
I/O
I/O
ST/TTL(3)
Digital I/O.
Parallel Slave Port data.
RD4/PSP4
RD4
PSP4
27
30
2
I/O
I/O
ST/TTL(3)
Digital I/O.
Parallel Slave Port data.
RD5/PSP5
RD5
PSP5
28
31
3
I/O
I/O
ST/TTL(3)
Digital I/O.
Parallel Slave Port data.
RD6/PSP6
RD6
PSP6
29
32
4
I/O
I/O
ST/TTL(3)
Digital I/O.
Parallel Slave Port data.
RD7/PSP7
RD7
PSP7
30
33
5
I/O
I/O
ST/TTL(3)
Digital I/O.
Parallel Slave Port data.
PORTE is a bidirectional I/O port.
RE0/AN5/RD/
RE0
AN5
RD
89
25
I/O
I
I
ST/TTL(3)
Digital I/O.
Analog input 5.
Read control for parallel slave port .
RE1/AN6/WR/
RE1
AN6
WR
910
26
I/O
I
I
ST/TTL(3)
Digital I/O.
Analog input 6.
Write control for parallel slave port .
RE2/AN7/CS
RE2
AN7
CS
10
11
27
I/O
I
I
ST/TTL(3)
Digital I/O.
Analog input 7.
Chip Select control for parallel slave port .
VSS
12,31
13,34
6,29
P
—
Ground reference for logic and I/O pins.
VDD
11,32
12,35
7,28
P
—
Positive supply for logic and I/O pins.
NC
—
1,17,
28, 40
12,13,
33, 34
—
These pins are not internally connected. These pins should
be left unconnected.
TABLE 1-3:
PIC16CR74 AND PIC16CR77 PINOUT DESCRIPTION (CONTINUED)
Pin Name
PDIP
Pin#
PLCC
Pin#
QFP
Pin#
I/O/P
Type
Buffer
Type
Description
Legend:
I = input
O = output
I/O = input/output
P = power
— = Not used
TTL = TTL input
ST = Schmitt Trigger input
Note
1:
This buffer is a Schmitt Trigger input when configured as an external interrupt.
2:
This buffer is a Schmitt Trigger input when used in Serial Verify mode.
3:
This buffer is a Schmitt Trigger input when configured as general purpose I/O and a TTL input when used in the Parallel
Slave Port mode (for interfacing to a microprocessor bus).
4:
This buffer is a Schmitt Trigger input when configured in RC Oscillator mode and a CMOS input otherwise.



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