PCF8534 datasheet(30/40 Pages) PHILIPS

30 / 40 page

PCF8534_0

Preliminary datasheet

Rev. 00.05 — 20 February 2007

30 of 40

NXP Semiconductors

PCF8534

Universal LCD driver for low multiplex rates

[1]

Typical output duty cycle of 50%.

[2]

All timing values are valid within the operating supply voltage and ambient temperature range and are referenced to VIL and VIH with an

input voltage swing of VSS to VDD.

tHD;STA

start condition hold time

0.6

μs

tSU;STA

set-up time for a repeated start condition

0.6

μs

tLOW

SCL LOW time

1.3

μs

tHIGH

SCL HIGH time

0.6

μs

SCL and SDA rise time

0.3

μs

SCL and SDA fall time

0.3

μs

capacitive bus line load

400

tSU;DAT

data set-up time

100

tHD;DAT

data hold time

tSU;STO

set up time for stop condition

0.6

μs

tSW

tolerable spike width on bus

Table 21.

Dynamic characteristics

VDD = 1.8 to 5.5 V; VSS = 0 V; VLCD = 2.5 to 6.5 V; TAMB =

−40 to +85°C; unless otherwise specified

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

Fig 19. Test loads

gewidth

MGS120v02

3.3 k

1.5 k

0.5VDD

VDD

VSS

SDA,

SCL

CLK

1 nF

BP0 to BP3, and

S0 to S59

(2%)

6.8

VDD

SYNC

(2%)

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