TLV2548MFKB datasheet(17/41 Pages) TI

17 / 41 page

TLV2544Q, TLV2548Q, TLV2548M

3-V TO 5.5-V, 12-BIT, 200-KSPS, 4-/8-CHANNEL, LOW-POWER

SERIAL ANALOG-TO-DIGITAL CONVERTERS WITH AUTOPOWER-DOWN

SGLS119C – FEBRUARY 2002 – REVISED OCTOBER 2002

POST OFFICE BOX 655303

• DALLAS, TEXAS 75265

modes using the FIFO: modes 01, 10, 11 timing (continued)

CSTART

SDI

INT

SDO

From Channel 0

(DSP)

Configure

Conversion

Read FIFO

Top of FIFO

Read FIFO

From Channel 0

Conversion

Repeat

First FIFO Read

Second FIFO Read

Repeat

‡

†

‡‡

‡

From Channel 3

Conversion

From Channel 3

t(sample)

† Command = Configure write for mode 10 or 11, FIFO threshold = 1/2, sweep seq = 0–1–2–3.

‡ Command = Read FIFO

Figure 13. TLV2544/TLV2548 Mode 10/11 DSP Serial Interface (Conversions Triggered by CSTART)

CSTART

SDI

INT

SDO

From Channel 0

Configure

Conversion

Read FIFO

Top of FIFO

Conversion

Repeat

First FIFO Read

Second FIFO Read

Repeat

‡

†

‡‡

‡

From Channel 3

From Channel 0

From Channel 3

Read FIFO

† Command = Configure write for mode 10 or 11, FIFO threshold = 1/2, sweep seq = 0–1–2–3.

‡ Command = Read FIFO

Figure 14. TLV2544/TLV2548 Mode 10/11

µp Serial Interface (Conversions Triggered by CS)

TLV2548MFKB Datasheet(PDF) 17 Page - Texas Instruments

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