TLV2548MFKB datasheet(2/41 Pages) TI

2 / 41 page

TLV2544Q, TLV2548Q, TLV2548M

3-V TO 5.5-V, 12-BIT, 200-KSPS, 4-/8-CHANNEL, LOW-POWER

SERIAL ANALOG-TO-DIGITAL CONVERTERS WITH AUTOPOWER-DOWN

SGLS119C – FEBRUARY 2002 – REVISED OCTOBER 2002

POST OFFICE BOX 655303

• DALLAS, TEXAS 75265

description (continued)

In addition to a high-speed A/D converter and versatile control capability, these devices have an on-chip analog

multiplexer that can select any analog inputs or one of three internal self-test voltages. The sample-and-hold

function is automatically started after the fourth SCLK edge (normal sampling) or can be controlled by a special

pin, CSTART, to extend the sampling period (extended sampling). The normal sampling period can also be

programmed as short (12 SCLKs) or as long (24 SCLKs) to accommodate faster SCLK operation popular

among high-performance signal processors. The TLV2548 and TLV2544 are designed to operate with very low

power consumption. The power-saving feature is further enhanced with software/hardware/autopower-down

modes and programmable conversion speeds. The conversion clock (OSC) and reference are built-in. The

converter can use the external SCLK as the source of the conversion clock to achieve higher (up to 2.8

µs when

a 20 MHz SCLK is used) conversion speed. Two different internal reference voltages are available. An optional

external reference can also be used to achieve maximum flexibility.

The TLV2544Q and the TLV2548Q are characterized for operation from –40

°C to 125°C. The TLV2548M is

characterized for operation from –55

°C to 125°C.

functional block diagram

Command

Decode

SDI

EOC/(INT)

Low Power

12-BIT

SAR ADC

Control Logic

CSTART

PWDN

VCC

GND

REFP

4/2 V

Reference

S/H

OSC

Conversion

Clock

FIFO

12 Bit

× 8

CFR

SCLK

SDO

2548

REFM

2544

CMR (4 MSBs)

AVAILABLE OPTIONS

20-SOIC

(DW)

16-SOIC

(D)

20-LCCC

(FK)

–40

°C to 125°C TLV2548QDW

TLV2544QD

—

–55

°C to 125°C

—

TLV2548MFK

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