MPC8280 datasheet(444/1386 Pages) FREESCALE

444 / 1386 page

Memory Controller

MPC8280 PowerQUICC II Family Reference Manual, Rev. 1

11-24

Freescale Semiconductor

11.3.4

Local Bus SDRAM Mode Register (LSDMR)

The LSDMR, shown in Figure 11-10, has the same fields as the PSDMR. Table 11-9 describes LSDMR

fields.

Table 11-9. LSDMR Field Descriptions

Bits

Name

Description

PBI

Page-based interleaving. Selects the address multiplexing method. PBI works in conjunction

with LSDMR[SDA10]. See Section 11.4.5, “Bank Interleaving.”

0 Bank-based interleaving

1 Page-based interleaving (normal operation)

RFEN

Refresh enable. Indicates that the SDRAM requires refresh services.

0 Refresh services are not required

1 Refresh services are required

2–4

SDRAM operation. Selects the operation that occurs when the SDRAM device is accessed.

000 Normal operation

001 CBR refresh, used in SDRAM initialization.

010 Self refresh (for debug purpose).

011 Mode Register write, used in SDRAM initialization.

100 Precharge bank (for debug purpose).

101 Precharge all banks, used in SDRAM initialization.

110 Activate bank (for debug purpose).

111 Read/write (for debug purpose).

5–7

SDAM

Address multiplex size. Determines how the address of the current memory cycle is output on

the address pins. See Section 11.4.5.2, “SDRAM Address Multiplexing (SDAM and BSMA).”

8–10

BSMA

Bank select multiplexed address line. Selects which MPC8280 address pins serve as

bank-select address for the local bus SDRAM. See Section 11.4.5.2, “SDRAM Address

Multiplexing (SDAM and BSMA).”

000 L_A14 (OR

x[BPD] must be 00)

001 L_A–L_A15 (OR

x[BPD] must be 00 or 01)

010 L_A14–L_A16

011 L_A15–L_A17

100 L_A16–L_A18

101 L_A17–L_A19

110 L_A18–L_A20

111 L_A19–L_A21

11–13

SDA10

“A10” control. When SDRAM is selected, with LSDMR[PBI], determines which address line is

output to SDA10 during an ACTIVATE command, to control the memory access. See

Section 11.4.12.1, “SDRAM Configuration Example (Page-Based Interleaving).”

For PBI=0:

000 A12

001 A11

010 A10

011 A9

100 A8

101 A7

110 A6

111 A5

For PBI=1:

000 A10

001 A9

010 A8

011 A7

100 A6

101 A5

110 A4

111 A3

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