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MPC8280 Datasheet(PDF) 473 Page - Freescale Semiconductor, Inc |
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MPC8280 Datasheet(HTML) 473 Page - Freescale Semiconductor, Inc |
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473 / 1386 page ![]() Memory Controller MPC8280 PowerQUICC II Family Reference Manual, Rev. 1 Freescale Semiconductor 11-53 11.5.1 Timing Configuration If BRx[MS] selects the GPCM, the attributes for the memory cycle are taken from ORx. These attributes include the CSNT, ACS[0–1], SCY[0–3], TRLX, EHTR, and SETA fields. Table 11-31 shows signal behavior and system response. Table 11-31. GPCM Strobe Signal Behavior Option Register Attributes Signal Behavior TRLX Access ACS CSNT Address to CS Asserted CS Negated to Address Change WE Negated to Address/Data Invalid Total Cycles 0Read 00 x 0 0 x 2+SCY1 1 SCY is the number of wait cycles from the option register. 0 Read 10 x 1/4*Clock 0 x 2+SCY 0 Read 11 x 1/2*Clock 0 x 2+SCY 0 Write 00 0 0 0 0 2+SCY 0 Write 10 0 1/4*Clock 0 0 2+SCY 0 Write 11 0 1/2*Clock 0 0 2+SCY 0 Write 00 1 0 0 -1/4*Clock 2+SCY 0 Write 10 1 1/4*Clock -1/4*Clock -1/4*Clock 2+SCY 0 Write 11 1 1/2*Clock -1/4*Clock -1/4*Clock 2+SCY 1Read 00 x 0 0 x 2+2*SCY 1 Read 10 x (1+1/4)*Clock 0 x 3+2*SCY 1 Read 11 x (1+1/2)*Clock 0 x 3+2*SCY 1 Write 00 0 0 0 0 2+2*SCY 1 Write 10 0 (1+1/4)*Clock 0 0 3+2*SCY 1 Write 11 0 (1+1/2)*Clock 0 0 3+2*SCY 1 Write 00 1 0 0 -1-1/4*Clock 3+2*SCY 1 Write 10 1 (1+1/4)*Clock -1-1/4*Clock -1-1/4*Clock 4+2*SCY 1 Write 11 1 (1+1/2)*Clock -1-1/4*Clock -1-1/4*Clock 4+2*SCY |
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