MPC8280 datasheet(605/1386 Pages) FREESCALE

605 / 1386 page

Serial Interface with Time-Slot Assigner

MPC8280 PowerQUICC II Family Reference Manual, Rev. 1

Freescale Semiconductor

15-27

Figure 15-22. IDL Terminal Adaptor

The MPC8280 can identify and support each IDL channel or can output strobe lines for interfacing devices

that do not support the IDL bus. The IDL signals for each transmit and receive channel are described in

Table 15-9.

Table 15-9. IDL Signal Descriptions

Signal

Description

L1RCLK

IDL clock; input to the MPC8280.

L1RSYNC

x IDL sync signal; input to the MPC8280. This signal indicates that the clock periods following the

pulse designate the IDL frame.

L1RXD

IDL receive data; input to the MPC8280. Valid only for the bits supported by the IDL; ignored for any

other signals present.

L1TXD

IDL transmit data; output from the MPC8280. Valid only for the bits that are supported by the IDL;

otherwise, three-stated.

L1RQ

IDL request permission to transmit on the D channel; output from the MPC8280 on the L1RQx pin.

L1GR

IDL grant permission to transmit on the D Channel; input to the MPC8280 on the L1TSYNCx pin.

Note:

x = a, b, c, and d for TDMa, TDMb, TDMc, and TDMd (for SI1 and SI2).

TSA

SCC1

Ethernet

PHY

LAN

ASYNC

PCM

CODEC/Filter

Monocircuit

S/T

Transceiver

SPI

ICL

(Control)

B1+B2+D

IDL

(Data)

B2+D

MPC8280

System Bus (ROM and RAM)

SMC1

POTS

4 wire

SCC2

SMC2

SCC3

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