| Electronic Components Datasheet Search |
|
MPC8280 Datasheet(PDF) 666 Page - Freescale Semiconductor, Inc |
|
|
|||||||||||||||||||||||||||||
MPC8280 Datasheet(HTML) 666 Page - Freescale Semiconductor, Inc |
|
666 / 1386 page ![]() SDMA Channels and IDMA Emulation MPC8280 PowerQUICC II Family Reference Manual, Rev. 1 19-20 Freescale Semiconductor 19.8.2.2 Data Transfer Types as Programmed in DCM Table 19-6 summarizes the types of data transfers according to the DCM programming. 19.8.2.3 Programming DTS and STS The options for setting STS and DTS depend on (DCM[DMA_WRAP]) and are described in the following tables for memory/memory and memory/peripheral transfers. Table 19-7 describes valid STS/DTS values for memory-to-memory operations. Table 19-6. IDMA Channel Data Transfer Operation S/D FB Read From Write To Description (Steady-State Operation) 01 0 Memory (STS = SS_MAX) Peripheral (DTS = port size or 32) Read from memory: Filling internal buffer in one DMA transfer. On the bus: one burst or more, depends on STS Write to peripheral: In smaller transfers until internal buffer empties. On the bus: singles or burst, depends on DTS 10 0 Peripheral (STS = port size or 32) Memory (DTS = SS_MAX) Read from peripheral: Filling internal buffer in several DMA transfers. On the bus: singles or burst, depends on STS Write to memory: in one DMA transfer, internal buffer empties. On the bus: one burst or more, depends on DTS 00 0 Memory (STS = SS_MAX) Memory (DTS = SS_MAX or less) Read from memory: Filling internal buffer in one DMA transfer. On the bus: one burst or more, depends on STS Write to memory: in one transfer or more until internal buffer empties. On the bus: singles or bursts, depends on DTS 00 0 Memory (STS = SS_MAX or less) Memory (DTS = SS_MAX) Read from memory: Filling internal buffer in one or more DMA transfers. On the bus: singles or bursts, depends on STS Write to memory: in one DMA transfer, internal buffer empties. On the bus: one burst or more, depends on DTS 01 1 Memory to peripheral (DTS = port size or 32) — Read transaction from memory while asserting DACK to peripheral. Peripheral samples the data read from memory. On the bus: singles or bursts, depends on DTS 10 1 — Peripheral to memory (STS = port size or 32) Write transaction to memory while asserting DACK to peripheral. Peripheral provides the data that is written to the memory. On the bus: singles or bursts, depends on STS |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |