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MPC8280 Datasheet(PDF) 949 Page - Freescale Semiconductor, Inc

Part # MPC8280
Description  PowerQUICC??II Family Reference Manual
PDF  1386 Pages
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Manufacturer  FREESCALE [Freescale Semiconductor, Inc]
Direct Link  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

MPC8280 Datasheet(HTML) 949 Page - Freescale Semiconductor, Inc

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Fast Communications Controllers (FCCs)
MPC8280 PowerQUICC II Family Reference Manual, Rev. 1
Freescale Semiconductor
30-11
For frame-based protocols, a message can reside in as many buffers as necessary (transmit or receive).
Each buffer has a maximum length of (64K–1) bytes. The CP does not assume that all buffers of a single
frame are currently linked to the BD table. It does assume, however, that unlinked buffers are provided by
the core soon enough to be sent or received. Failure to do so causes an error condition being reported by
the CP. An underrun error is reported in the case of transmit; a busy error is reported in the case of receive.
Because BDs are prefetched, the receive BD table must always contain at least one empty BD to avoid a
busy error; therefore, RxBD tables must always have at least two BDs.
The BDs and data buffers can be anywhere in the system memory.
The CP processes the TxBDs in a straightforward fashion. Once the transmit side of an FCC is enabled, it
starts with the first BD in that FCC’s TxBD table. When the CP detects that TxBD[R] is set, it begins
processing the buffer. The CP detects that the BD is ready either by polling the R bit periodically or by the
user writing to the FTODR. When the data from the BD has been placed in the transmit FIFO buffer, the
CP moves on to the next BD, again waiting for the R bit to be set. Thus, the CP does no look-ahead BD
processing, nor does it skip over BDs that are not ready. When the CP sees the wrap (W) bit set in a BD,
it goes back to the beginning of the BD table after processing of the BD is complete.
After using a BD, the CP normally clears R (not-ready); thus, the CP does not use a BD again until the BD
has been prepared by the core. Some protocols support continuous mode, which allows repeated
transmission and for which the R bit remains set (always ready).
The CP uses RxBDs in a similar fashion. Once the receive side of an FCC is enabled, it starts with the first
BD in the FCC’s RxBD table. Once data arrives from the serial line into the FCC, the CP performs the
required protocol processing on the data and moves the resultant data to the buffer pointed to by the first
BD. Use of a BD is complete when no room is left in the buffer or when certain events occur, such as the
detection of an error or end-of-frame. Regardless of the reason, the buffer is then said to be closed and
additional data is stored using the next BD. Whenever the CP needs to begin using a BD because new data
is arriving, it checks the E bit of that BD. This check is made on a prefetched copy of the current BD. If
the current BD is not empty, it reports a busy error. However, it does not move from the current BD until
it is empty. Because there is a periodic prefetch of the RxBD, the busy error may recur if the BD is not
prepared soon enough.
When the CP sees the W bit set in a BD, it returns to the beginning of the BD table after processing of the
BD is complete. After using a BD, the CP clears the E bit (not empty) and does not use a BD again until
the BD has been processed by the core. However, in continuous mode, available to some protocols, the E
bit remains set (always empty).
0
15
Offset + 0
Status and Control
Offset + 2
Data Length
Offset + 4
High-Order Data Buffer Pointer
Offset + 6
Low-Order Data Buffer Pointer
Figure 30-7. Buffer Descriptor Format



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