MPC8280 datasheet(1140/1386 Pages) FREESCALE

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ATM AAL2

MPC8280 PowerQUICC II Family Reference Manual, Rev. 1

33-34

Freescale Semiconductor

33.5

AAL2 Parameter RAM

When configured for ATM mode, the FCC parameter RAM is mapped as shown in Table 33-13. The table

includes both the fields for general ATM operation and also the fields specific to AAL2 operation.

Note that some of the values must be initialized by the user, but values updated by the CP should not be

modified by the user.

0x02

—

Data

Length

Contains the length of the buffer associated with this BD. If this is the last buffer (L=1)

of the SSSAR SDU, this field contains the total frame length.

0x04

—

RXDBPTR

Rx data buffer pointer. Points to the address of the associated buffer. There are no

byte-alignment requirements for the buffer, and it may reside in either internal or

external memory. This value is not modified by the CP.

Boldfaced entries must be initialized by the user.

2 When RAS timer expires the RxBD is closed with RAS timer expired indication, the Last (L) bit is not set, and RXF

interrupt is not issued. A new RxBD is opened for the next incoming AAL2 packet and the frame is processed as

normal and is treated as a new frame. When the next SSSAR end-of-frame indication is received, the RxBD at that

time is closed with an L indication, and if RxQD[RFM] = 1, the receiver issues an RXF interrupt.

Table 33-13. AAL2 Parameter RAM

Offset

Name

Width

Description

0x00–

0x3F

—

Reserved. Should be cleared during initialization.

0x40

RCELL_TMP_BASE

Hword

Rx cell temporary base address. Points to a total of 64 bytes reserved

dual-port RAM area used by the CP. Should be 64 byte aligned.

User-defined. (Recommended address space: 0x3000–0x4000 or

0xB000–0xC000.)

0x42

TCELL_TMP_BASE

Hword

Tx cell temporary base address. Points to total of 64 bytes reserved

dual-port RAM area used by the CP. Should be 64-byte aligned.

User-defined.

(Recommended address space: 0x3000–0x4000 or 0xB000–0xC000.)

0x44

UDC_TMP_BASE

Hword

UDC mode only. Points to a total of 32 bytes reserved dual-port RAM

area used by the CP. Should be 64-byte aligned. User-defined.

(Recommended address space: 0x3000–0x4000 or 0xB000–0xC000.)

0x46

INT_RCT_BASE

Hword

Internal receive connection table base. User-defined.

0x48

INT_TCT_BASE

Hword

Internal transmit connection table base. User-defined.

0x4A

INT_TCTE_BASE

Hword

Internal transmit connection table extension base. User-defined.

0x4C

RAS_Timer_Duration

Word

Contains the RAS_Timer duration in microseconds for the SSSAR

sublayer. User-defined.

0x50

EXT_RCT_BASE

Word

External receive connection table base. User-defined.

0x54

EXT_TCT_BASE

Word

External transmit connection table base. User-defined.

0x58

EXT_TCTE_BASE

Word

External transmit connection table extension base. User-defined.

Table 33-12. SSSAR RxBD Field Descriptions (continued)

Offset

Bits

Name1

Description

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