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MPC8280 Datasheet(PDF) 1349 Page - Freescale Semiconductor, Inc

Part # MPC8280
Description  PowerQUICC??II Family Reference Manual
PDF  1386 Pages
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Manufacturer  FREESCALE [Freescale Semiconductor, Inc]
Direct Link  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

MPC8280 Datasheet(HTML) 1349 Page - Freescale Semiconductor, Inc

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MPC8280 PowerQUICC II Family Reference Manual, Rev. 1
Freescale Semiconductor
Glossary-5
Least-significant byte (LSB). Byte of least value in an address, register, data element, or
instruction encoding.
Little-endian. Byte-ordering method in memory where the address n of a word
corresponds to the least-significant byte. In an addressed memory word, the bytes
are ordered (left to right) 3, 2, 1, 0, with 3 being the most-significant byte. See
Big-endian.
M
Master. Name given to a bus device that has been granted control or mastership of the bus.
Memory access ordering. Specific order in which the processor performs load and store
memory accesses and the order in which those accesses complete.
Memory controller. Unit whose primary function is to control the external bus memories
and I/O devices.
Memory coherency. Aspect of caching in which it is ensured that an accurate view of
memory is provided to all devices that share system memory.
Memory consistency. Refers to agreement of levels of memory with respect to a single
processor and system memory (for example, on-chip cache, secondary cache, and
system memory).
Memory management unit (MMU). The functional unit that is capable of translating an
effective (logical) address to a physical address, providing protection
mechanisms, and defining caching methods.
Microarchitecture. The hardware details of a microprocessor’s design. Such details are
not defined by the PowerPC architecture.
Mnemonic. The abbreviated name of an instruction used for coding.
Modified state. When a cache block is in the modified state, it has been modified by the
processor since it was copied from memory. See MESI.
Munging. A modification performed on an effective address that allows it to appear to the
processor that individual aligned scalars are stored as little-endian values, when in
fact it is stored in big-endian order, but at different byte addresses within double
words. Note that munging affects only the effective address and not the byte order.
Note also that this term is not used by the PowerPC architecture.
Most-significant bit (msb). Highest-order bit in an address, registers, data element, or
instruction encoding.
Most-significant byte (MSB). Highest-order byte in an address, registers, data element, or
instruction encoding.
N
No-op. No-operation. A single-cycle operation that does not affect registers or generate bus
activity.



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