S29GL01GS10DFIV13 datasheet(29/108 Pages) CYPRESS

29 / 108 page

Document Number: 001-98285 Rev. *R

Page 29 of 108

S29GL01GS/S29GL512S

S29GL256S/S29GL128S

5.4.4.2

Sector Erase

The sector erase function erases one sector in the memory array. The device does not require the system to preprogram prior to

erase. The Embedded Erase algorithm automatically programs and verifies the entire sector for an all 0 data pattern prior to

electrical erase. After a successful sector erase, all locations within the erased sector contain FFFFh. The system is not required to

provide any controls or timings during these operations. The sector erase command sequence is initiated by writing two unlock

cycles, followed by a set up command. Two additional unlock write cycles are then followed by the address of the sector to be

erased, and the sector erase command. When WE# goes high, at the end of the 6th cycle, the RY/BY# goes low.

The system can determine the status of the erase operation by reading the Status Register or using Data Polling. Refer to Status

Once the sector erase operation has begun, the Status Register Read and Erase Suspend commands are valid. All other

commands are ignored. However, note that a hardware reset immediately terminates the erase operation and returns to read mode

after tRPH time. If a sector erase operation is terminated, the sector erase command sequence must be reinitiated once the device

has reset operation to ensure data integrity.

See Embedded Algorithm Controller (EAC) on page 20 for parameters and timing diagrams.

Sectors protected by the ASP DYB and PPB lock bits will not be erased. See ASP on page 14.

Figure 5.4 Sector Erase Operation

Write Unlock Cycles:

Address 555h, Data AAh

Address 2AAh, Data 55h

Write Sector Erase Cycles:

Address 555h, Data 80h

Address 555h, Data AAh

Address 2AAh, Data 55h

Sector Address, Data 30h

FAIL. Write reset command

to return to reading array.

PASS. Device returns

to reading array.

Perform Write Operation

Status Algorithm

Unlock Cycle 1

Unlock Cycle 2

Yes

Done?

Erase Error?

Command Cycle 1

Command Cycle 2

Command Cycle 3

Specify first sector for erasure

Error condition (Exceeded Timing Limits)

Status may be obtained by Status Register Polling

or Data Polling methods.

S29GL01GS10DFIV13 Datasheet(PDF) 29 Page - Cypress Semiconductor

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