S29GL01GS10DFIV13 datasheet(37/108 Pages) CYPRESS

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Document Number: 001-98285 Rev. *R

Page 37 of 108

S29GL01GS/S29GL512S

S29GL256S/S29GL128S

5.5.2.4

DQ2: Toggle Bit II

Toggle Bit II on DQ2, when used with DQ6, indicates whether a particular sector is actively erasing (that is, the Embedded Erase

algorithm is in progress), or whether that sector is erase-suspended. Toggle Bit II is valid after the rising edge of the final WE# pulse

in the command sequence.

DQ2 toggles when the system reads at addresses within the sector selected for erasure. (The system may use either OE# or CE# to

control the read cycles). But DQ2 cannot distinguish whether the sector is actively erasing or is erase-suspended. DQ6, by

comparison, indicates whether the device is actively erasing, or is in Erase Suspend, but cannot distinguish if the sector is selected

for erasure. Thus, both status bits are required for sector and mode information. Refer to Table 5.3 on page 39 to compare outputs

for DQ2 and DQ6. Figure 5.5 on page 36 shows the toggle bit algorithm in flowchart form, and the Reading Toggle Bits DQ6/DQ2

on page 37 explains the algorithm. See also Figure 5.6 on page 37 shows the toggle bit timing diagram. Figure 5.2 on page 25

shows the differences between DQ2 and DQ6 in graphical form.

5.5.2.5

Reading Toggle Bits DQ6/DQ2

Refer to Figure5.5 onpage36 for the following discussion. Whenever the system initially begins reading toggle bit status, it must

read DQ7-DQ0 at least twice in a row to determine whether a toggle bit is toggling. Typically, the system would note and store the

value of the toggle bit after the first read. After the second read, the system would compare the new value of the toggle bit with the

previous value. If the toggle bit is not toggling, the device has completed the program or erases operation. The system can read

array data on DQ15-DQ0 on the following read cycle.

However, if after the initial two read cycles, the system determines that the toggle bit is still toggling, the system also should note

whether the value of DQ5 is High (see DQ5: Exceeded Timing Limits onpage38). If it is, the system should then determine again

whether the toggle bit is toggling, since the toggle bit may have stopped toggling just as DQ5 went High. If the toggle bit is no longer

toggling, the device has successfully completed the program or erase operation. If it is still toggling, the device did not complete the

operation successfully, and the system must write the reset command to return to reading array data.

The remaining scenario is that the system initially determines that the toggle bit is toggling and DQ5 has not gone High. The system

may continue to monitor the toggle bit and DQ5 through successive read cycles, determining the status as described in the previous

paragraph. Alternatively, it may choose to perform other system tasks. In this case, the system must start at the beginning of the

algorithm when it returns to determine the status of the operation (top of Figure 5.6 on page 37).

Figure 5.6 Toggle Bit Program

Notes:

1. Read toggle bit twice to determine whether or not it is toggling. See text.

2. Recheck toggle bit because it may stop toggling as DQ5 changes to 1. See text.

START

Read DQ7 -DQ0 (Note 1)

Erase/Program

Operation Not

Complete

Toggle Bit

= Toggle?

Yes

DQ5 = 1?

Yes

Read DQ7 -DQ0 Twice (Notes 1, 2)

Toggle Bit

= Toggle?

Yes

Erase/Program

Operation Complete

Read DQ7 -DQ0

S29GL01GS10DFIV13 Datasheet(PDF) 37 Page - Cypress Semiconductor

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