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S29GL01GS10DFIV13 Datasheet(PDF) 86 Page - Cypress Semiconductor |
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S29GL01GS10DFIV13 Datasheet(HTML) 86 Page - Cypress Semiconductor |
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86 / 108 page  Document Number: 001-98285 Rev. *R Page 86 of 108 S29GL01GS/S29GL512S S29GL256S/S29GL128S Figure 11.14 Program Operation Timing Diagram Note: 1. PA = program address, PD = program data, DOUT is the true data at the program address. Figure 11.15 Chip/Sector Erase Operation Timing Diagram Note: 1. SA = sector address (for sector erase), VA = valid address for reading status data. OE# WE# CE# Data Addresses tDS tAH tDH tWP PD tWHWH1 tWC tAS tWPH 555h PA PA Read Status Data (last two cycles) A0h tCS Status DOUT Program Command Sequence (last two cycles) RY/BY# tRB tBUSY tCH PA OE# CE# Addresses WE# Data 2AAh SA tAH tWP tWC tAS tWPH 555h for chip erase 10 for Chip Erase tDS tCS tDH tCH tWHWH2 VA VA Erase Command Sequence (last two cycles) Read Status Data (last two cycles) RY/BY# tRB tBUSY 30h In Progress Complete 55h |
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