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STM32WBA62CGF6 Datasheet(PDF) 48 Page - STMicroelectronics

Part # STM32WBA62CGF6
Description  Multiprotocol wireless 32-bit MCU Arm®-based Cortex®-M33 with TrustZone , FPU, Bluetooth IEEE802.15.4 radio solution
PDF  185 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM32WBA62CGF6 Datasheet(HTML) 48 Page - STMicroelectronics

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Functional overview
STM32WBA6xxx
48/185
DS14736 Rev 1
ADC4 has up to 19 multiplexed channels, allowing it to measure signals from up to 10
external and 3 internal sources (the other channels are reserved). The conversion of the
various channels can be performed in Single, Continuous, Scan or Discontinuous mode.
The result of is stored in a left-aligned or right-aligned 16-bit data register.
The analog watchdog feature allows the application to detect if the input voltage goes
outside the user-defined higher or lower thresholds.
An efficient low-power mode is implemented to allow very low consumption at low
frequency. The ADC4 is autonomous in low-power modes down to Stop modes.
A built-in hardware oversampler allows analog performances to be improved while
off-loading the related computational burden from the CPU.
The ADC4 main features are:
•
High performance
–
12-, 10-, 8- or 6-bit configurable resolution
–
ADC conversion time: 0.4 µs for 12-bit resolution (2.5 MHz), faster conversion
times obtained by lowering resolution
–
Self-calibration
–
Programmable sampling time
–
Data alignment with built-in data coherency
–
DMA support
•
Low-power
–
PCLK frequency reduced for low-power operation while still keeping optimum
ADC performance
–
Wait mode: ADC overrun prevented in applications with low frequency PCLK
–
Auto-off mode: ADC automatically powered off except during the active
conversion phase, dramatically reducing the ADC power consumption
–
Autonomous mode: in low-power modes (down to Stop 1), the ADC4 automatically
switches on when a trigger occurs to start conversion, and it automatically
switches off after conversion. Data are transfered to SRAM with DMA.
–
ADC4 interrupts wake up the device down to Stop 1 mode.
Injected channel conversion
-
Oversampling
Up to x256
Data register
16 bits
DMA support
X
Autonomous mode
X
Offset compensation
-
Gain compensation
-
Number of analog watchdogs
3
Wake-up from Stop mode
X
1. X = supported.
Table 13. ADC features (continued)
ADC modes/features(1)
ADC4



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